[Mesa-dev] [PATCH 13/14] radeonsi: consolidate radeon_add_to_buffer_list calls for DMA

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeon/r600_pipe_common.c | 14 ++++++++++++++
 src/gallium/drivers/radeonsi/cik_sdma.c       | 23 -----------------------
 src/gallium/drivers/radeonsi/si_dma.c         | 10 ----------
 3 files changed, 14 insertions(+), 33 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index c0579da..3eb12f3 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -166,6 +166,20 @@ void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw,
 		ctx->dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
 		assert((num_dw + ctx->dma.cs->cdw) <= ctx->dma.cs->max_dw);
 	}
+
+	/* If GPUVM is not supported, the CS checker needs 2 entries
+	 * in the buffer list per packet, which has to be done manually.
+	 */
+	if (ctx->screen->info.has_virtual_memory) {
+		if (dst)
+			radeon_add_to_buffer_list(ctx, &ctx->dma, dst,
+						  RADEON_USAGE_WRITE,
+						  RADEON_PRIO_SDMA_BUFFER);
+		if (src)
+			radeon_add_to_buffer_list(ctx, &ctx->dma, src,
+						  RADEON_USAGE_READ,
+						  RADEON_PRIO_SDMA_BUFFER);
+	}
 }
 
 /* This is required to prevent read-after-write hazards. */
diff --git a/src/gallium/drivers/radeonsi/cik_sdma.c b/src/gallium/drivers/radeonsi/cik_sdma.c
index 29d9a00..17c3a83 100644
--- a/src/gallium/drivers/radeonsi/cik_sdma.c
+++ b/src/gallium/drivers/radeonsi/cik_sdma.c
@@ -49,11 +49,6 @@ static void cik_sdma_do_copy_buffer(struct si_context *ctx,
 	ncopy = DIV_ROUND_UP(size, CIK_SDMA_COPY_MAX_SIZE);
 	r600_need_dma_space(&ctx->b, ncopy * 7, rdst, rsrc);
 
-	radeon_add_to_buffer_list(&ctx->b, &ctx->b.dma, rsrc, RADEON_USAGE_READ,
-			      RADEON_PRIO_SDMA_BUFFER);
-	radeon_add_to_buffer_list(&ctx->b, &ctx->b.dma, rdst, RADEON_USAGE_WRITE,
-			      RADEON_PRIO_SDMA_BUFFER);
-
 	for (i = 0; i < ncopy; i++) {
 		csize = MIN2(size, CIK_SDMA_COPY_MAX_SIZE);
 		cs->buf[cs->cdw++] = CIK_SDMA_PACKET(CIK_SDMA_OPCODE_COPY,
@@ -213,12 +208,6 @@ static bool cik_sdma_copy_texture(struct si_context *sctx,
 		struct radeon_winsys_cs *cs = sctx->b.dma.cs;
 
 		r600_need_dma_space(&sctx->b, 13, &rdst->resource, &rsrc->resource);
-		radeon_add_to_buffer_list(&sctx->b, &sctx->b.dma, &rsrc->resource,
-					  RADEON_USAGE_READ,
-					  RADEON_PRIO_SDMA_TEXTURE);
-		radeon_add_to_buffer_list(&sctx->b, &sctx->b.dma, &rdst->resource,
-					  RADEON_USAGE_WRITE,
-					  RADEON_PRIO_SDMA_TEXTURE);
 
 		radeon_emit(cs, CIK_SDMA_PACKET(CIK_SDMA_OPCODE_COPY,
 						CIK_SDMA_COPY_SUB_OPCODE_LINEAR_SUB_WINDOW, 0) |
@@ -381,12 +370,6 @@ static bool cik_sdma_copy_texture(struct si_context *sctx,
 			struct radeon_winsys_cs *cs = sctx->b.dma.cs;
 
 			r600_need_dma_space(&sctx->b, 14, &rdst->resource, &rsrc->resource);
-			radeon_add_to_buffer_list(&sctx->b, &sctx->b.dma, &rsrc->resource,
-						  RADEON_USAGE_READ,
-						  RADEON_PRIO_SDMA_TEXTURE);
-			radeon_add_to_buffer_list(&sctx->b, &sctx->b.dma, &rdst->resource,
-						  RADEON_USAGE_WRITE,
-						  RADEON_PRIO_SDMA_TEXTURE);
 
 			radeon_emit(cs, CIK_SDMA_PACKET(CIK_SDMA_OPCODE_COPY,
 							CIK_SDMA_COPY_SUB_OPCODE_TILED_SUB_WINDOW, 0) |
@@ -483,12 +466,6 @@ static bool cik_sdma_copy_texture(struct si_context *sctx,
 			struct radeon_winsys_cs *cs = sctx->b.dma.cs;
 
 			r600_need_dma_space(&sctx->b, 15, &rdst->resource, &rsrc->resource);
-			radeon_add_to_buffer_list(&sctx->b, &sctx->b.dma, &rsrc->resource,
-						  RADEON_USAGE_READ,
-						  RADEON_PRIO_SDMA_TEXTURE);
-			radeon_add_to_buffer_list(&sctx->b, &sctx->b.dma, &rdst->resource,
-						  RADEON_USAGE_WRITE,
-						  RADEON_PRIO_SDMA_TEXTURE);
 
 			radeon_emit(cs, CIK_SDMA_PACKET(CIK_SDMA_OPCODE_COPY,
 							CIK_SDMA_COPY_SUB_OPCODE_T2T_SUB_WINDOW, 0));
diff --git a/src/gallium/drivers/radeonsi/si_dma.c b/src/gallium/drivers/radeonsi/si_dma.c
index 25fb4b7..1ba61f5 100644
--- a/src/gallium/drivers/radeonsi/si_dma.c
+++ b/src/gallium/drivers/radeonsi/si_dma.c
@@ -66,11 +66,6 @@ static void si_dma_copy_buffer(struct si_context *ctx,
 
 	r600_need_dma_space(&ctx->b, ncopy * 5, rdst, rsrc);
 
-	radeon_add_to_buffer_list(&ctx->b, &ctx->b.dma, rsrc, RADEON_USAGE_READ,
-			      RADEON_PRIO_SDMA_BUFFER);
-	radeon_add_to_buffer_list(&ctx->b, &ctx->b.dma, rdst, RADEON_USAGE_WRITE,
-			      RADEON_PRIO_SDMA_BUFFER);
-
 	for (i = 0; i < ncopy; i++) {
 		csize = size < max_csize ? size : max_csize;
 		cs->buf[cs->cdw++] = SI_DMA_PACKET(SI_DMA_PACKET_COPY, sub_cmd, csize);
@@ -163,11 +158,6 @@ static void si_dma_copy_tile(struct si_context *ctx,
 	ncopy = (size / SI_DMA_COPY_MAX_SIZE_DW) + !!(size % SI_DMA_COPY_MAX_SIZE_DW);
 	r600_need_dma_space(&ctx->b, ncopy * 9, &rdst->resource, &rsrc->resource);
 
-	radeon_add_to_buffer_list(&ctx->b, &ctx->b.dma, &rsrc->resource,
-			      RADEON_USAGE_READ, RADEON_PRIO_SDMA_TEXTURE);
-	radeon_add_to_buffer_list(&ctx->b, &ctx->b.dma, &rdst->resource,
-			      RADEON_USAGE_WRITE, RADEON_PRIO_SDMA_TEXTURE);
-
 	for (i = 0; i < ncopy; i++) {
 		cheight = copy_height;
 		if (((cheight * pitch) / 4) > SI_DMA_COPY_MAX_SIZE_DW) {
-- 
2.7.4