[Mesa-dev] [PATCH 1/4] winsys/amdgpu: move gart_page_size to struct radeon_winsys

[Nicolai Hähnle]

For the series:

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

On 08.05.2016 07:21, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> ---
>   src/gallium/drivers/radeon/radeon_winsys.h    |  1 +
>   src/gallium/winsys/amdgpu/drm/amdgpu_bo.c     | 16 ++++++++--------
>   src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c |  2 +-
>   src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h |  1 -
>   4 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
> index 79c548c..442a461 100644
> --- a/src/gallium/drivers/radeon/radeon_winsys.h
> +++ b/src/gallium/drivers/radeon/radeon_winsys.h
> @@ -242,6 +242,7 @@ struct radeon_info {
>       uint32_t                    pci_id;
>       enum radeon_family          family;
>       enum chip_class             chip_class;
> +    uint32_t                    gart_page_size;
>       uint64_t                    gart_size;
>       uint64_t                    vram_size;
>       bool                        has_dedicated_vram;
> diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
> index 37a41c0..eb28ba9 100644
> --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
> +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
> @@ -137,9 +137,9 @@ void amdgpu_bo_destroy(struct pb_buffer *_buf)
>         amdgpu_fence_reference(&bo->fence[i], NULL);
>
>      if (bo->initial_domain & RADEON_DOMAIN_VRAM)
> -      bo->ws->allocated_vram -= align64(bo->base.size, bo->ws->gart_page_size);
> +      bo->ws->allocated_vram -= align64(bo->base.size, bo->ws->info.gart_page_size);
>      else if (bo->initial_domain & RADEON_DOMAIN_GTT)
> -      bo->ws->allocated_gtt -= align64(bo->base.size, bo->ws->gart_page_size);
> +      bo->ws->allocated_gtt -= align64(bo->base.size, bo->ws->info.gart_page_size);
>      FREE(bo);
>   }
>
> @@ -327,9 +327,9 @@ static struct amdgpu_winsys_bo *amdgpu_create_bo(struct amdgpu_winsys *ws,
>      bo->unique_id = __sync_fetch_and_add(&ws->next_bo_unique_id, 1);
>
>      if (initial_domain & RADEON_DOMAIN_VRAM)
> -      ws->allocated_vram += align64(size, ws->gart_page_size);
> +      ws->allocated_vram += align64(size, ws->info.gart_page_size);
>      else if (initial_domain & RADEON_DOMAIN_GTT)
> -      ws->allocated_gtt += align64(size, ws->gart_page_size);
> +      ws->allocated_gtt += align64(size, ws->info.gart_page_size);
>
>      amdgpu_add_buffer_to_global_list(bo);
>
> @@ -469,7 +469,7 @@ amdgpu_bo_create(struct radeon_winsys *rws,
>       * BOs. Aligning this here helps the cached bufmgr. Especially small BOs,
>       * like constant/uniform buffers, can benefit from better and more reuse.
>       */
> -   size = align64(size, ws->gart_page_size);
> +   size = align64(size, ws->info.gart_page_size);
>
>      /* Only set one usage bit each for domains and flags, or the cache manager
>       * might consider different sets of domains / flags compatible
> @@ -576,9 +576,9 @@ static struct pb_buffer *amdgpu_bo_from_handle(struct radeon_winsys *rws,
>         *offset = whandle->offset;
>
>      if (bo->initial_domain & RADEON_DOMAIN_VRAM)
> -      ws->allocated_vram += align64(bo->base.size, ws->gart_page_size);
> +      ws->allocated_vram += align64(bo->base.size, ws->info.gart_page_size);
>      else if (bo->initial_domain & RADEON_DOMAIN_GTT)
> -      ws->allocated_gtt += align64(bo->base.size, ws->gart_page_size);
> +      ws->allocated_gtt += align64(bo->base.size, ws->info.gart_page_size);
>
>      amdgpu_add_buffer_to_global_list(bo);
>
> @@ -668,7 +668,7 @@ static struct pb_buffer *amdgpu_bo_from_ptr(struct radeon_winsys *rws,
>       bo->initial_domain = RADEON_DOMAIN_GTT;
>       bo->unique_id = __sync_fetch_and_add(&ws->next_bo_unique_id, 1);
>
> -    ws->allocated_gtt += align64(bo->base.size, ws->gart_page_size);
> +    ws->allocated_gtt += align64(bo->base.size, ws->info.gart_page_size);
>
>       amdgpu_add_buffer_to_global_list(bo);
>
> diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
> index e6db145..ad4f21f 100644
> --- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
> +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
> @@ -292,7 +292,7 @@ static boolean do_winsys_init(struct amdgpu_winsys *ws, int fd)
>      memcpy(ws->info.cik_macrotile_mode_array, ws->amdinfo.gb_macro_tile_mode,
>             sizeof(ws->amdinfo.gb_macro_tile_mode));
>
> -   ws->gart_page_size = alignment_info.size_remote;
> +   ws->info.gart_page_size = alignment_info.size_remote;
>
>      return TRUE;
>
> diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
> index 91b9be4..f28524a 100644
> --- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
> +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
> @@ -55,7 +55,6 @@ struct amdgpu_winsys {
>      uint64_t allocated_gtt;
>      uint64_t buffer_wait_time; /* time spent in buffer_wait in ns */
>      uint64_t num_cs_flushes;
> -   unsigned gart_page_size;
>
>      struct radeon_info info;
>
>