[Mesa-dev] [PATCH v2 00/15] Add ARB_vertex_attrib_64bit for i965 scalar (gen8+)

Antia Puentes apuentes at igalia.com
Thu May 12 18:28:06 UTC 2016


the following series is a resend of the implementation for the
ARB_vertex_attrib_64bit extension on the i965 scalar backend (gen8+).

This resend includes all the feedback received to v1 plus:

 * Minor changes after rebasing the series against the updated version
    of the arb_gpu_shader_fp64 extension, that is being reviewed on the
       list too right now. Those changes were basically adapt our function
          calls after changes on their signatures, and a retype of the dest
             register when shufling (patch 05)

 * Two new patches, to handle properly the linking, as agreed with
    Kenneth Graunke on this email [1]. Those two are the only ones
       totally unreviewed right now:

     [PATCH 11/15] glsl/linker: dvec3/dvec4 may consume twice input vertex attributes
          [PATCH 12/15] dri/i965: dvec3/dvec4 consume twice input vertex attributes

Again, as this work depends on the ARB_gpu_shader_fp64 i965
functionality [2], which is work in progress, the aim of sending the
series now is to get early feedback and parallelise the review

The series applies on top of the current version of the
https://github.com/Igalia/mesa/tree/i965-fp64 branch,
which contains the last fp64 work for gen8.

A frozen version of the branch containing the fp64 patches + the
series is available in our repo:

$ git clone -b i965-attrib64-v2 https://github.com/Igalia/mesa.git

[1] https://lists.freedesktop.org/archives/mesa-dev/2016-May/116381.html
[2] https://bugs.freedesktop.org/show_bug.cgi?id=92760

Alejandro PiƱeiro (6):
  i965: get the proper vertex surface type for doubles on gen8+
  i965: passthru formats cannot be used width edge flag enabled
  i965/fs: half exec_size when dealing with 64 bits attributes
  i965: Enable ARB_vertex_attrib_64bit for gen8+
  docs: Mark ARB_vertex_attrib_64bit as done for i965/gen8+
  i965: Expose OpenGL 4.2 for gen8+

Antia Puentes (1):
  i965: Configure how to store *64*PASSTHRU vertex components

Juan A. Suarez Romero (8):
  i965/fs: shuffle 32bits into 64bits for doubles
  nir: add double input bitmap
  i965: take care of doubles when remapping VS attributes
  i965/vec4: use attribute slots to calculate URB read length
  i965/fs: calculate first non-payload GRF using attrib slots
  i965: take care of doubles when lowering VS inputs
  glsl/linker: dvec3/dvec4 may consume twice input vertex attributes
  dri/i965: dvec3/dvec4 consume twice input vertex attributes

 docs/GL3.txt                                 |  2 +-
 src/compiler/glsl/linker.cpp                 | 72 ++++++++++++++++++++--------
 src/compiler/nir/glsl_to_nir.cpp             |  1 +
 src/compiler/nir/nir.h                       |  2 +
 src/mesa/drivers/dri/i965/brw_compiler.h     |  1 +
 src/mesa/drivers/dri/i965/brw_context.c      |  2 +
 src/mesa/drivers/dri/i965/brw_draw_upload.c  | 30 ++++++++++--
 src/mesa/drivers/dri/i965/brw_fs.cpp         | 36 ++++++++++++--
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp     |  6 +++
 src/mesa/drivers/dri/i965/brw_nir.c          | 29 +++++------
 src/mesa/drivers/dri/i965/brw_shader.h       |  1 +
 src/mesa/drivers/dri/i965/brw_vec4.cpp       | 13 +++--
 src/mesa/drivers/dri/i965/gen8_draw_upload.c | 55 +++++++++++++++++++++
 src/mesa/drivers/dri/i965/intel_extensions.c |  3 +-
 src/mesa/drivers/dri/i965/intel_screen.c     |  2 +-
 src/mesa/main/context.c                      |  2 +
 src/mesa/main/mtypes.h                       | 13 +++++
 17 files changed, 221 insertions(+), 49 deletions(-)


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