[Mesa-dev] [PATCH] i965: Add support for GL_ARB_cull_distance
Kristian Høgsberg
krh at bitplanet.net
Fri May 13 04:06:22 UTC 2016
From: Kristian Høgsberg Kristensen <kristian.h.kristensen at intel.com>
Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
---
Setting cull_distance_mask for gs and tes now as well. Also, moved
extension enable bit into gen6+ section.
src/mesa/drivers/dri/i965/brw_compiler.h | 2 ++
src/mesa/drivers/dri/i965/brw_gs.c | 4 ++++
src/mesa/drivers/dri/i965/brw_tes.c | 4 ++++
src/mesa/drivers/dri/i965/brw_vs.c | 4 ++++
src/mesa/drivers/dri/i965/gen6_clip_state.c | 2 ++
src/mesa/drivers/dri/i965/gen8_ds_state.c | 3 ++-
src/mesa/drivers/dri/i965/gen8_gs_state.c | 3 ++-
src/mesa/drivers/dri/i965/gen8_vs_state.c | 3 ++-
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
9 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h b/src/mesa/drivers/dri/i965/brw_compiler.h
index 5807305..3d1dc88 100644
--- a/src/mesa/drivers/dri/i965/brw_compiler.h
+++ b/src/mesa/drivers/dri/i965/brw_compiler.h
@@ -592,6 +592,8 @@ struct brw_vue_prog_data {
GLuint urb_read_length;
GLuint total_grf;
+ uint32_t cull_distance_mask;
+
/* Used for calculating urb partitions. In the VS, this is the size of the
* URB entry used for both input and output to the thread. In the GS, this
* is the size of the URB entry used for output.
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index c888ef2..91efd34 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -138,6 +138,10 @@ brw_codegen_gs_prog(struct brw_context *brw,
GLbitfield64 outputs_written = gp->program.Base.OutputsWritten;
+ prog_data.base.cull_distance_mask =
+ ((1 << gp->program.Base.CullDistanceArraySize) - 1) <<
+ gp->program.Base.ClipDistanceArraySize;
+
brw_compute_vue_map(brw->intelScreen->devinfo,
&prog_data.base.vue_map, outputs_written,
prog ? prog->SeparateShader : false);
diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c
index 27dc7e5..b7f1677 100644
--- a/src/mesa/drivers/dri/i965/brw_tes.c
+++ b/src/mesa/drivers/dri/i965/brw_tes.c
@@ -164,6 +164,10 @@ brw_codegen_tes_prog(struct brw_context *brw,
prog_data.base.base.nr_params = param_count;
prog_data.base.base.nr_image_params = tes->NumImages;
+ prog_data.base.cull_distance_mask =
+ ((1 << tep->program.Base.CullDistanceArraySize) - 1) <<
+ tep->program.Base.ClipDistanceArraySize;
+
brw_nir_setup_glsl_uniforms(nir, shader_prog, &tep->program.Base,
&prog_data.base.base,
compiler->scalar_stage[MESA_SHADER_TESS_EVAL]);
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index 3095d82..1bbc315 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -118,6 +118,10 @@ brw_codegen_vs_prog(struct brw_context *brw,
prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
}
+ prog_data.base.cull_distance_mask =
+ ((1 << vp->program.Base.CullDistanceArraySize) - 1) <<
+ vp->program.Base.ClipDistanceArraySize;
+
if (brw->gen < 6) {
/* Put dummy slots into the VUE for the SF to put the replaced
* point sprite coords in. We shouldn't need these dummy slots,
diff --git a/src/mesa/drivers/dri/i965/gen6_clip_state.c b/src/mesa/drivers/dri/i965/gen6_clip_state.c
index 8ae19c8..26de633 100644
--- a/src/mesa/drivers/dri/i965/gen6_clip_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_clip_state.c
@@ -50,6 +50,8 @@ upload_clip_state(struct brw_context *brw)
dw2 |= GEN6_CLIP_NON_PERSPECTIVE_BARYCENTRIC_ENABLE;
}
+ dw1 |= brw->vs.prog_data->base.cull_distance_mask;
+
if (brw->gen >= 7)
dw1 |= GEN7_CLIP_EARLY_CULL;
diff --git a/src/mesa/drivers/dri/i965/gen8_ds_state.c b/src/mesa/drivers/dri/i965/gen8_ds_state.c
index c730168..95582ac 100644
--- a/src/mesa/drivers/dri/i965/gen8_ds_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_ds_state.c
@@ -69,7 +69,8 @@ gen8_upload_ds_state(struct brw_context *brw)
GEN7_DS_SIMD8_DISPATCH_ENABLE : 0) |
(tes_prog_data->domain == BRW_TESS_DOMAIN_TRI ?
GEN7_DS_COMPUTE_W_COORDINATE_ENABLE : 0));
- OUT_BATCH(SET_FIELD(ctx->Transform.ClipPlanesEnabled,
+ OUT_BATCH(SET_FIELD(vue_prog_data->cull_distance_mask |
+ ctx->Transform.ClipPlanesEnabled,
GEN8_DS_USER_CLIP_DISTANCE));
if (brw->gen >= 9) {
diff --git a/src/mesa/drivers/dri/i965/gen8_gs_state.c b/src/mesa/drivers/dri/i965/gen8_gs_state.c
index 0889311..2741330 100644
--- a/src/mesa/drivers/dri/i965/gen8_gs_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_gs_state.c
@@ -108,7 +108,8 @@ gen8_upload_gs_state(struct brw_context *brw)
OUT_BATCH(dw8);
/* DW9 / _NEW_TRANSFORM */
- OUT_BATCH((ctx->Transform.ClipPlanesEnabled <<
+ OUT_BATCH((prog_data->cull_distance_mask |
+ ctx->Transform.ClipPlanesEnabled <<
GEN8_GS_USER_CLIP_DISTANCE_SHIFT) |
(urb_entry_output_length << GEN8_GS_URB_OUTPUT_LENGTH_SHIFT) |
(urb_entry_write_offset <<
diff --git a/src/mesa/drivers/dri/i965/gen8_vs_state.c b/src/mesa/drivers/dri/i965/gen8_vs_state.c
index fd59a86..d4a3455 100644
--- a/src/mesa/drivers/dri/i965/gen8_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_vs_state.c
@@ -77,7 +77,8 @@ upload_vs_state(struct brw_context *brw)
GEN6_VS_ENABLE);
/* _NEW_TRANSFORM */
- OUT_BATCH((ctx->Transform.ClipPlanesEnabled <<
+ OUT_BATCH(prog_data->cull_distance_mask |
+ (ctx->Transform.ClipPlanesEnabled <<
GEN8_VS_USER_CLIP_DISTANCE_SHIFT));
ADVANCE_BATCH();
}
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c
index 8d98788..f8faaa3 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -289,6 +289,7 @@ intelInitExtensions(struct gl_context *ctx)
ctx->Extensions.ARB_blend_func_extended =
!driQueryOptionb(&brw->optionCache, "disable_blend_func_extended");
ctx->Extensions.ARB_conditional_render_inverted = true;
+ ctx->Extensions.ARB_cull_distance = true;
ctx->Extensions.ARB_draw_buffers_blend = true;
ctx->Extensions.ARB_ES3_compatibility = true;
ctx->Extensions.ARB_fragment_layer_viewport = true;
--
2.5.0
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