[Mesa-dev] [PATCH 22/28] i965/blorp: Add support for discard-based bounds checks to the NIR path

[Pohjolainen, Topi]

On Tue, May 10, 2016 at 04:16:42PM -0700, Jason Ekstrand wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 19 ++++++++++++++++++-
>  1 file changed, 18 insertions(+), 1 deletion(-)

Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>

> 
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
> index f94dd6f..27aab20 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
> @@ -423,6 +423,23 @@ blorp_blit_apply_transform(nir_builder *b, nir_ssa_def *src_pos,
>     return pos;
>  }
>  
> +static inline void
> +blorp_nir_discard_if_outside_rect(nir_builder *b, nir_ssa_def *pos,
> +                                  struct brw_blorp_blit_vars *v)
> +{
> +   nir_ssa_def *c0, *c1, *c2, *c3;
> +   c0 = nir_ult(b, nir_channel(b, pos, 0), nir_load_var(b, v->u_dst_x0));
> +   c1 = nir_uge(b, nir_channel(b, pos, 0), nir_load_var(b, v->u_dst_x1));
> +   c2 = nir_ult(b, nir_channel(b, pos, 1), nir_load_var(b, v->u_dst_y0));
> +   c3 = nir_uge(b, nir_channel(b, pos, 1), nir_load_var(b, v->u_dst_y1));
> +   nir_ssa_def *oob = nir_ior(b, nir_ior(b, c0, c1), nir_ior(b, c2, c3));
> +
> +   nir_intrinsic_instr *discard =
> +      nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard_if);
> +   discard->src[0] = nir_src_for_ssa(oob);
> +   nir_builder_instr_insert(b, &discard->instr);
> +}
> +
>  static nir_tex_instr *
>  blorp_create_nir_tex_instr(nir_shader *shader, nir_texop op,
>                             nir_ssa_def *pos, unsigned num_srcs,
> @@ -781,7 +798,7 @@ brw_blorp_build_nir_shader(struct brw_context *brw,
>      * now is the time to do it.
>      */
>     if (key->use_kill)
> -      goto fail;
> +      blorp_nir_discard_if_outside_rect(&b, dst_pos, &v);
>  
>     src_pos = blorp_blit_apply_transform(&b, nir_i2f(&b, dst_pos), &v);
>  
> -- 
> 2.5.0.400.gff86faf
> 
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