[Mesa-dev] [PATCH 06/28] i965/gen7_wm: Move where we set the fast clear op

[Pohjolainen, Topi]

On Tue, May 10, 2016 at 04:16:26PM -0700, Jason Ekstrand wrote:
> This better matches gen8 state setup

I don't think anything in the rest of the series depends on this:

Acked-by: Topi Pohjolainen <topi.pohjolainen at intel.com>

> ---
>  src/mesa/drivers/dri/i965/gen7_wm_state.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
> index 17dea99..8d2e2c3 100644
> --- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
> @@ -214,6 +214,8 @@ gen7_upload_ps_state(struct brw_context *brw,
>     if (prog_data->num_varying_inputs != 0)
>        dw4 |= GEN7_PS_ATTRIBUTE_ENABLE;
>  
> +   dw4 |= fast_clear_op;
> +
>     if (prog_data->prog_offset_16 || prog_data->no_8) {
>        dw4 |= GEN7_PS_16_DISPATCH_ENABLE;
>  
> @@ -243,8 +245,6 @@ gen7_upload_ps_state(struct brw_context *brw,
>        ksp0 = stage_state->prog_offset;
>     }
>  
> -   dw4 |= fast_clear_op;
> -
>     BEGIN_BATCH(8);
>     OUT_BATCH(_3DSTATE_PS << 16 | (8 - 2));
>     OUT_BATCH(ksp0);
> -- 
> 2.5.0.400.gff86faf
> 
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