[Mesa-dev] [PATCH v3 08/16] i965/surface_formats: Update the VB column for new formats added on BYT

[Jason Ekstrand]

Bay Trail and Haswell added a bunch of new vertex formats.  There was also
the addition of 64-bit passthrough formats for BDW+.
---
 src/mesa/drivers/dri/i965/brw_surface_formats.c | 32 ++++++++++++-------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index 16667b9..750f37a 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -274,26 +274,26 @@ const struct brw_surface_format_info surface_formats[] = {
    SF(80, 80,  x,  x,  x,  x,  x,  x,  x,    x,   EAC_SIGNED_R11)
    SF(80, 80,  x,  x,  x,  x,  x,  x,  x,    x,   EAC_SIGNED_RG11)
    SF(80, 80,  x,  x,  x,  x,  x,  x,  x,    x,   ETC2_SRGB8)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   R16G16B16_UINT)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   R16G16B16_SINT)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   R32_SFIXED)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   R10G10B10A2_SNORM)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   R10G10B10A2_USCALED)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   R10G10B10A2_SSCALED)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   R10G10B10A2_SINT)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   B10G10R10A2_SNORM)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   B10G10R10A2_USCALED)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   B10G10R10A2_SSCALED)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   B10G10R10A2_UINT)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   B10G10R10A2_SINT)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   R64G64B64A64_PASSTHRU)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   R64G64B64_PASSTHRU)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   R16G16B16_UINT)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   R16G16B16_SINT)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   R32_SFIXED)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   R10G10B10A2_SNORM)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   R10G10B10A2_USCALED)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   R10G10B10A2_SSCALED)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   R10G10B10A2_SINT)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   B10G10R10A2_SNORM)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   B10G10R10A2_USCALED)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   B10G10R10A2_SSCALED)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   B10G10R10A2_UINT)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   B10G10R10A2_SINT)
+   SF( x,  x,  x,  x,  x,  x, 80,  x,  x,    x,   R64G64B64A64_PASSTHRU)
+   SF( x,  x,  x,  x,  x,  x, 80,  x,  x,    x,   R64G64B64_PASSTHRU)
    SF(80, 80,  x,  x,  x,  x,  x,  x,  x,    x,   ETC2_RGB8_PTA)
    SF(80, 80,  x,  x,  x,  x,  x,  x,  x,    x,   ETC2_SRGB8_PTA)
    SF(80, 80,  x,  x,  x,  x,  x,  x,  x,    x,   ETC2_EAC_RGBA8)
    SF(80, 80,  x,  x,  x,  x,  x,  x,  x,    x,   ETC2_EAC_SRGB8_A8)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   R8G8B8_UINT)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   R8G8B8_SINT)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   R8G8B8_UINT)
+   SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   R8G8B8_SINT)
    SF(80, 80,  x,  x,  x,  x,  x,  x,  x,    x,   ASTC_LDR_2D_4x4_FLT16)
    SF(80, 80,  x,  x,  x,  x,  x,  x,  x,    x,   ASTC_LDR_2D_5x4_FLT16)
    SF(80, 80,  x,  x,  x,  x,  x,  x,  x,    x,   ASTC_LDR_2D_5x5_FLT16)
-- 
2.5.0.400.gff86faf