[Mesa-dev] [PATCH 21/29] radeon/r200: Use bitmask/ffs to iterate enabled clip planes.
Mathias.Froehlich at gmx.net
Mathias.Froehlich at gmx.net
Tue May 24 06:49:04 UTC 2016
From: Mathias Fröhlich <mathias.froehlich at web.de>
Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
---
src/mesa/drivers/dri/r200/r200_state.c | 24 ++++++++++++------------
src/mesa/drivers/dri/radeon/radeon_state.c | 24 ++++++++++++------------
2 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c
index 86144e0..4790524 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -1360,18 +1360,18 @@ static void r200ClipPlane( struct gl_context *ctx, GLenum plane, const GLfloat *
static void r200UpdateClipPlanes( struct gl_context *ctx )
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
- GLuint p;
-
- for (p = 0; p < ctx->Const.MaxClipPlanes; p++) {
- if (ctx->Transform.ClipPlanesEnabled & (1 << p)) {
- GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
-
- R200_STATECHANGE( rmesa, ucp[p] );
- rmesa->hw.ucp[p].cmd[UCP_X] = ip[0];
- rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1];
- rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2];
- rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
- }
+ GLbitfield mask = ctx->Transform.ClipPlanesEnabled;
+
+ while (mask) {
+ const int p = ffs(mask) - 1;
+ GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
+ mask ^= (1u << p);
+
+ R200_STATECHANGE( rmesa, ucp[p] );
+ rmesa->hw.ucp[p].cmd[UCP_X] = ip[0];
+ rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1];
+ rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2];
+ rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
}
}
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index 5f52b39..a2c2625 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -1134,18 +1134,18 @@ static void radeonClipPlane( struct gl_context *ctx, GLenum plane, const GLfloat
static void radeonUpdateClipPlanes( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
- GLuint p;
-
- for (p = 0; p < ctx->Const.MaxClipPlanes; p++) {
- if (ctx->Transform.ClipPlanesEnabled & (1 << p)) {
- GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
-
- RADEON_STATECHANGE( rmesa, ucp[p] );
- rmesa->hw.ucp[p].cmd[UCP_X] = ip[0];
- rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1];
- rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2];
- rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
- }
+ GLbitfield mask = ctx->Transform.ClipPlanesEnabled;
+
+ while (mask) {
+ const int p = ffs(mask) - 1;
+ GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
+ mask ^= (1u << p);
+
+ RADEON_STATECHANGE( rmesa, ucp[p] );
+ rmesa->hw.ucp[p].cmd[UCP_X] = ip[0];
+ rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1];
+ rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2];
+ rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
}
}
--
2.5.5
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