[Mesa-dev] [PATCH] nvc0: enable 32 textures on kepler+

[Ilia Mirkin]

This wasn't from compilers yelling at me, it was just from a visual
audit of the relevant code which all of a sudden got moved to using 32
objects from 16. I'd be happy to revert those hunks.

On Tue, May 24, 2016 at 4:05 AM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> The idea sounds good to me, but this (1U << i) needs consistency in my
> opinion. It's correct and avoid some compiler warnings (if the corresponding
> flags are used) but we currently don't do that.
>
> I would suggest to keep the (1 << i) for now, and maybe make a separate
> patch which replaces 1 by 1U whenever it's possible. What do you think?
>
>
> On 05/24/2016 06:23 AM, Ilia Mirkin wrote:
>>
>> For fermi, this likely will require use of linked tsc mode. However on
>> bindless architectures, we can have as many as we want. As it stands,
>> the AUX_TEX_INFO has 32 teture handles reserved.
>>
>> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
>> ---
>>  src/gallium/drivers/nouveau/nvc0/nvc0_context.h |  2 +-
>>  src/gallium/drivers/nouveau/nvc0/nvc0_screen.c  |  4 ++--
>>  src/gallium/drivers/nouveau/nvc0/nvc0_tex.c     | 12 ++++++------
>>  3 files changed, 9 insertions(+), 9 deletions(-)
>>
>> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
>> b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
>> index 436e912..5be78aa 100644
>> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
>> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
>> @@ -197,7 +197,7 @@ struct nvc0_context {
>>     uint32_t textures_coherent[6];
>>     struct nv50_tsc_entry *samplers[6][PIPE_MAX_SAMPLERS];
>>     unsigned num_samplers[6];
>> -   uint16_t samplers_dirty[6];
>> +   uint32_t samplers_dirty[6];
>>     bool seamless_cube_map;
>>
>>     uint32_t tex_handles[6][PIPE_MAX_SAMPLERS]; /* for nve4 */
>> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
>> b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
>> index 7d692ea..4c47503 100644
>> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
>> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
>> @@ -369,9 +369,9 @@ nvc0_screen_get_shader_param(struct pipe_screen
>> *pscreen, unsigned shader,
>>     case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
>>        return NVC0_MAX_BUFFERS;
>>     case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
>> -      return 16; /* would be 32 in linked (OpenGL-style) mode */
>> +      return (class_3d >= NVE4_3D_CLASS) ? 32 : 16;
>>     case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
>> -      return 16; /* XXX not sure if more are really safe */
>> +      return (class_3d >= NVE4_3D_CLASS) ? 32 : 16;
>>     case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
>>        return 32;
>>     case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
>> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
>> b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
>> index 2523c20..2c6f3eb 100644
>> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
>> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
>> @@ -446,7 +446,7 @@ nvc0_validate_tic(struct nvc0_context *nvc0, int s)
>>     for (i = 0; i < nvc0->num_textures[s]; ++i) {
>>        struct nv50_tic_entry *tic = nv50_tic_entry(nvc0->textures[s][i]);
>>        struct nv04_resource *res;
>> -      const bool dirty = !!(nvc0->textures_dirty[s] & (1 << i));
>> +      const bool dirty = !!(nvc0->textures_dirty[s] & (1U << i));
>>
>>        if (!tic) {
>>           if (dirty)
>> @@ -523,7 +523,7 @@ nve4_validate_tic(struct nvc0_context *nvc0, unsigned
>> s)
>>     for (i = 0; i < nvc0->num_textures[s]; ++i) {
>>        struct nv50_tic_entry *tic = nv50_tic_entry(nvc0->textures[s][i]);
>>        struct nv04_resource *res;
>> -      const bool dirty = !!(nvc0->textures_dirty[s] & (1 << i));
>> +      const bool dirty = !!(nvc0->textures_dirty[s] & (1U << i));
>>
>>        if (!tic) {
>>           nvc0->tex_handles[s][i] |= NVE4_TIC_ENTRY_INVALID;
>> @@ -564,7 +564,7 @@ nve4_validate_tic(struct nvc0_context *nvc0, unsigned
>> s)
>>     }
>>     for (; i < nvc0->state.num_textures[s]; ++i) {
>>        nvc0->tex_handles[s][i] |= NVE4_TIC_ENTRY_INVALID;
>> -      nvc0->textures_dirty[s] |= 1 << i;
>> +      nvc0->textures_dirty[s] |= 1U << i;
>>     }
>>
>>     nvc0->state.num_textures[s] = nvc0->num_textures[s];
>> @@ -593,7 +593,7 @@ void nvc0_validate_textures(struct nvc0_context *nvc0)
>>  bool
>>  nvc0_validate_tsc(struct nvc0_context *nvc0, int s)
>>  {
>> -   uint32_t commands[16];
>> +   uint32_t commands[32];
>>     struct nouveau_pushbuf *push = nvc0->base.pushbuf;
>>     unsigned i;
>>     unsigned n = 0;
>> @@ -602,7 +602,7 @@ nvc0_validate_tsc(struct nvc0_context *nvc0, int s)
>>     for (i = 0; i < nvc0->num_samplers[s]; ++i) {
>>        struct nv50_tsc_entry *tsc = nv50_tsc_entry(nvc0->samplers[s][i]);
>>
>> -      if (!(nvc0->samplers_dirty[s] & (1 << i)))
>> +      if (!(nvc0->samplers_dirty[s] & (1U << i)))
>>           continue;
>>        if (!tsc) {
>>           commands[n++] = (i << 4) | 0;
>> @@ -676,7 +676,7 @@ nve4_validate_tsc(struct nvc0_context *nvc0, int s)
>>     }
>>     for (; i < nvc0->state.num_samplers[s]; ++i) {
>>        nvc0->tex_handles[s][i] |= NVE4_TSC_ENTRY_INVALID;
>> -      nvc0->samplers_dirty[s] |= 1 << i;
>> +      nvc0->samplers_dirty[s] |= 1U << i;
>>     }
>>
>>     nvc0->state.num_samplers[s] = nvc0->num_samplers[s];
>>
>
> --
> -Samuel