[Mesa-dev] [PATCH 12/21] i965/fs: Clean up remaining uses of dispatch_width in the generator.

[Francisco Jerez]

Jason Ekstrand <jason at jlekstrand.net> writes:

> Does this mean we can delete the field from brw_fs_generator?
>
Almost, there is still one use left in fire_fb_write() (for the dual
source blend last-rt hack) which we will be able to get rid of
eventually, but it cannot simply be replaced with inst->exec_size
because it's really the shader dispatch width what it needs right now.

> On Tue, May 24, 2016 at 12:18 AM, Francisco Jerez <currojerez at riseup.net>
> wrote:
>
>> Most of these are bugs because the intended execution size of an
>> instruction and the dispatch width of the shader aren't necessarily
>> the same (especially in SIMD32 programs).
>> ---
>>  src/mesa/drivers/dri/i965/brw_eu.h             |  1 -
>>  src/mesa/drivers/dri/i965/brw_eu_emit.c        |  3 +--
>>  src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 13 +++++++------
>>  3 files changed, 8 insertions(+), 9 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
>> b/src/mesa/drivers/dri/i965/brw_eu.h
>> index 91e3401..b057f17 100644
>> --- a/src/mesa/drivers/dri/i965/brw_eu.h
>> +++ b/src/mesa/drivers/dri/i965/brw_eu.h
>> @@ -281,7 +281,6 @@ void brw_svb_write(struct brw_codegen *p,
>>                     bool   send_commit_msg);
>>
>>  void brw_fb_WRITE(struct brw_codegen *p,
>> -                 int dispatch_width,
>>                    struct brw_reg payload,
>>                    struct brw_reg implied_header,
>>                    unsigned msg_control,
>> diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
>> b/src/mesa/drivers/dri/i965/brw_eu_emit.c
>> index 10cbbe8..ff8e207 100644
>> --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
>> +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
>> @@ -2342,7 +2342,6 @@ void brw_oword_block_read(struct brw_codegen *p,
>>
>>
>>  void brw_fb_WRITE(struct brw_codegen *p,
>> -                 int dispatch_width,
>>                    struct brw_reg payload,
>>                    struct brw_reg implied_header,
>>                    unsigned msg_control,
>> @@ -2358,7 +2357,7 @@ void brw_fb_WRITE(struct brw_codegen *p,
>>     unsigned msg_type;
>>     struct brw_reg dest, src0;
>>
>> -   if (dispatch_width == 16)
>> +   if (brw_inst_exec_size(devinfo, p->current) >= BRW_EXECUTE_16)
>>        dest = retype(vec16(brw_null_reg()), BRW_REGISTER_TYPE_UW);
>>     else
>>        dest = retype(vec8(brw_null_reg()), BRW_REGISTER_TYPE_UW);
>> diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>> b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>> index 71ac730..9751926 100644
>> --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>> +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>> @@ -229,7 +229,6 @@ fs_generator::fire_fb_write(fs_inst *inst,
>>
>>
>>     brw_fb_WRITE(p,
>> -                dispatch_width,
>>                  payload,
>>                  implied_header,
>>                  msg_control,
>> @@ -547,7 +546,7 @@ fs_generator::generate_linterp(fs_inst *inst,
>>      * See also: emit_interpolation_setup_gen4().
>>      */
>>     struct brw_reg delta_x = src[0];
>> -   struct brw_reg delta_y = offset(src[0], dispatch_width / 8);
>> +   struct brw_reg delta_y = offset(src[0], inst->exec_size / 8);
>>     struct brw_reg interp = src[1];
>>
>>     if (devinfo->has_pln &&
>> @@ -1206,10 +1205,11 @@
>> fs_generator::generate_varying_pull_constant_load_gen4(fs_inst *inst,
>>     uint32_t surf_index = index.ud;
>>
>>     uint32_t simd_mode, rlen, msg_type;
>> -   if (dispatch_width == 16) {
>> +   if (inst->exec_size == 16) {
>>        simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD16;
>>        rlen = 8;
>>     } else {
>> +      assert(inst->exec_size == 8);
>>        simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD8;
>>        rlen = 4;
>>     }
>> @@ -1267,11 +1267,12 @@
>> fs_generator::generate_varying_pull_constant_load_gen7(fs_inst *inst,
>>     assert(index.type == BRW_REGISTER_TYPE_UD);
>>
>>     uint32_t simd_mode, rlen, mlen;
>> -   if (dispatch_width == 16) {
>> +   if (inst->exec_size == 16) {
>>        mlen = 2;
>>        rlen = 8;
>>        simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD16;
>>     } else {
>> +      assert(inst->exec_size == 8);
>>        mlen = 1;
>>        rlen = 4;
>>        simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD8;
>> @@ -1407,9 +1408,9 @@ fs_generator::generate_set_sample_id(fs_inst *inst,
>>            src0.type == BRW_REGISTER_TYPE_UD);
>>
>>     struct brw_reg reg = stride(src1, 1, 4, 0);
>> -   if (devinfo->gen >= 8 || dispatch_width == 8) {
>> +   if (devinfo->gen >= 8 || inst->exec_size == 8) {
>>        brw_ADD(p, dst, src0, reg);
>> -   } else if (dispatch_width == 16) {
>> +   } else if (inst->exec_size == 16) {
>>        brw_push_insn_state(p);
>>        brw_set_default_exec_size(p, BRW_EXECUTE_8);
>>        brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
>> --
>> 2.7.3
>>
>> _______________________________________________
>> mesa-dev mailing list
>> mesa-dev at lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>>
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