[Mesa-dev] [PATCH 10/12] i965: add indirect packing support to gs load inputs

[Timothy Arceri]

---
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index a19ece7..16fd7d6 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -2126,14 +2126,24 @@ fs_visitor::emit_gs_input_load(const fs_reg &dst,
    } else {
       /* Indirect indexing - use per-slot offsets as well. */
       const fs_reg srcs[] = { icp_handle, get_nir_src(offset_src) };
+      unsigned read_components = num_components + first_component;
+      fs_reg tmp = bld.vgrf(dst.type, read_components);
       fs_reg payload = bld.vgrf(BRW_REGISTER_TYPE_UD, 2);
       bld.LOAD_PAYLOAD(payload, srcs, ARRAY_SIZE(srcs), 0);
-
-      inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dst, payload);
+      if (first_component != 0) {
+         inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp, payload);
+         inst->regs_written = read_components;
+         for (unsigned i = 0; i < num_components; i++) {
+            bld.MOV(offset(dst, bld, i),
+                    offset(tmp, bld, i + first_component));
+         }
+      } else {
+         inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dst, payload);
+         inst->regs_written = num_components;
+      }
       inst->offset = base_offset;
       inst->base_mrf = -1;
       inst->mlen = 2;
-      inst->regs_written = num_components;
    }
 
    if (is_point_size) {
-- 
2.5.5