[Mesa-dev] [PATCH] radeonsi: avoid divide by 0 in new TCS code.

[Dave Airlie]

From: Dave Airlie <airlied at redhat.com>

The CTS test:
GL45-CTS.shader_image_load_store.multiple-uniforms
regressed recently with the new offchip support.

Signed-off-by: Dave Airlie <airlied at redhat.com>
---
 src/gallium/drivers/radeonsi/si_state_draw.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 788869e..bff2a26 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -143,12 +143,14 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
 	 * use LDS for the inputs and outputs.
 	 */
 	hardware_lds_size = sctx->b.chip_class >= CIK ? 65536 : 32768;
-	*num_patches = MIN2(*num_patches, hardware_lds_size / (input_patch_size +
-	                                                       output_patch_size));
+	if (input_patch_size || output_patch_size)
+		*num_patches = MIN2(*num_patches, hardware_lds_size / (input_patch_size +
+			                                              output_patch_size));
 
 	/* Make sure the output data fits in the offchip buffer */
-	*num_patches = MIN2(*num_patches, SI_TESS_OFFCHIP_BLOCK_SIZE /
-	                                  output_patch_size);
+	if (output_patch_size)
+		*num_patches = MIN2(*num_patches, SI_TESS_OFFCHIP_BLOCK_SIZE /
+			                           output_patch_size);
 
 	/* Not necessary for correctness, but improves performance. The
 	 * specific value is taken from the proprietary driver.
-- 
2.5.5