[Mesa-dev] [PATCH] radeonsi: Always reserve space for tessellation factors.
Bas Nieuwenhuizen
bas at basnieuwenhuizen.nl
Fri May 27 08:08:18 UTC 2016
Those are always read for writing to the TF ring.
Should fix CTS test
GL45-CTS.shader_image_load_store.multiple-uniforms
after a regression due to the new tessellation code.
Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
---
I have no CTS, so it actually is not tested whether it fixes
this test.
src/gallium/drivers/radeonsi/si_state_draw.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 788869e..40592d0 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -125,6 +125,9 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
num_tcs_patch_outputs = 2; /* TESSINNER + TESSOUTER */
}
+ /* We always load TESSINNER and TESSOUTER to write to the tf ring. */
+ num_tcs_patch_outputs = MAX2(num_tcs_patch_outputs, 2);
+
input_vertex_size = num_tcs_inputs * 16;
output_vertex_size = num_tcs_outputs * 16;
--
2.8.3
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