[Mesa-dev] [PATCH 1/2] nvc0: drop unused surfaces formats conversion builtins
Samuel Pitoiset
samuel.pitoiset at gmail.com
Fri May 27 08:14:44 UTC 2016
This codegen lib code is no longer used for Kepler since we convert
the formats directly in the lowering pass.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
src/gallium/drivers/nouveau/codegen/lib/gk104.asm | 459 ----------------------
src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 52 ---
2 files changed, 511 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/lib/gk104.asm b/src/gallium/drivers/nouveau/codegen/lib/gk104.asm
index cd65b54..ef51406 100644
--- a/src/gallium/drivers/nouveau/codegen/lib/gk104.asm
+++ b/src/gallium/drivers/nouveau/codegen/lib/gk104.asm
@@ -87,465 +87,6 @@ gk104_div_s32:
$p2 cvt s32 $r1 neg s32 $r1
long ret
-// SULDP [for each format]
-// $r4d: address
-// $r2: surface info (format)
-// $p0: access predicate
-// $p1, $p2: caching predicate (00: cv, 01: ca, 10: cg)
-//
-// RGBA32
-$p1 suldgb b128 $r0q ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b128 $r0q cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b128 $r0q cv zero u8 g[$r4d] $r2 $p0
-long ret
-// RGBA16_UNORM
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb b128 $r0q ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b128 $r0q cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b128 $r0q cv zero u8 g[$r4d] $r2 $p0
-cvt rn f32 $r3 u16 1 $r1
-cvt rn f32 $r2 u16 0 $r1
-mul f32 $r3 $r3 0x37800074
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-cvt rn f32 $r1 u16 1 $r0
-mul f32 $r2 $r2 0x37800074
-cvt rn f32 $r0 u16 0 $r0
-mul f32 $r1 $r1 0x37800074
-mul f32 $r0 $r0 0x37800074
-long ret
-// RGBA16_SNORM
-$p1 suldgb b64 $r0d ca zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b64 $r0d cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b64 $r0d cv zero u8 g[$r4d] $r2 $p0
-cvt rn f32 $r3 s16 1 $r1
-cvt rn f32 $r2 s16 0 $r1
-mul f32 $r3 $r3 0x38000187
-cvt rn f32 $r1 s16 1 $r0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-mul f32 $r2 $r2 0x38000187
-cvt rn f32 $r0 s16 0 $r0
-mul f32 $r1 $r1 0x38000187
-mul f32 $r0 $r0 0x38000187
-long ret
-// RGBA16_SINT
-$p1 suldgb b64 $r0d ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p2 suldgb b64 $r0d cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b64 $r0d cv zero u8 g[$r4d] $r2 $p0
-cvt s32 $r3 s16 1 $r1
-cvt s32 $r2 s16 0 $r1
-cvt s32 $r1 s16 1 $r0
-cvt s32 $r0 s16 0 $r0
-long ret
-// RGBA16_UINT
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb b64 $r0d ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b64 $r0d cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b64 $r0d cv zero u8 g[$r4d] $r2 $p0
-cvt u32 $r3 u16 1 $r1
-cvt u32 $r2 u16 0 $r1
-cvt u32 $r1 u16 1 $r0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-cvt u32 $r0 u16 0 $r0
-long ret
-// RGBA16_FLOAT
-$p1 suldgb b64 $r0d ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b64 $r0d cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b64 $r0d cv zero u8 g[$r4d] $r2 $p0
-cvt f32 $r3 f16 $r1 1
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-cvt f32 $r2 f16 $r1 0
-cvt f32 $r1 f16 $r0 1
-cvt f32 $r0 f16 $r0 0
-long ret
-// RG32_FLOAT
-$p1 suldgb b64 $r0d ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b64 $r0d cg zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb b64 $r0d cv zero u8 g[$r4d] $r2 $p0
-long mov b32 $r2 0x00000000
-long mov b32 $r3 0x3f800000
-long ret
-// RG32_xINT
-$p1 suldgb b64 $r0d ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b64 $r0d cg zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb b64 $r0d cv zero u8 g[$r4d] $r2 $p0
-long mov b32 $r2 0x00000000
-long mov b32 $r3 0x00000001
-long ret
-// RGB10A2_UNORM
-$p1 suldgb b32 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b32 $r0 cg zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb b32 $r0 cv zero u8 g[$r4d] $r2 $p0
-ext u32 $r1 $r0 0x0a0a
-long mov b32 $r3 0x3f800000
-ext u32 $r2 $r0 0x0a14
-long and b32 $r0 $r0 0x3ff
-cvt rn f32 $r2 u16 0 $r2
-cvt rn f32 $r1 u16 0 $r1
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-mul f32 $r2 $r2 0x3a802007
-cvt rn f32 $r0 u16 0 $r0
-mul f32 $r1 $r1 0x3a802007
-mul f32 $r0 $r0 0x3a802007
-long ret
-// RGB10A2_UINT
-$p1 suldgb b32 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p2 suldgb b32 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b32 $r0 cv zero u8 g[$r4d] $r2 $p0
-ext u32 $r1 $r0 0x0a0a
-long mov b32 $r3 0x00000001
-ext u32 $r2 $r0 0x0a14
-long and b32 $r0 $r0 0x3ff
-long ret
-// RGBA8_UNORM
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb b32 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b32 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b32 $r0 cv zero u8 g[$r4d] $r2 $p0
-cvt rn f32 $r3 u8 3 $r0
-cvt rn f32 $r2 u8 2 $r0
-mul f32 $r3 $r3 0x3b808081
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-cvt rn f32 $r1 u8 1 $r0
-mul f32 $r2 $r2 0x3b808081
-cvt rn f32 $r0 u8 0 $r0
-mul f32 $r1 $r1 0x3b808081
-mul f32 $r0 $r0 0x3b808081
-long ret
-// RGBA8_SNORM
-$p1 suldgb b32 $r0 ca zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b32 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b32 $r0 cv zero u8 g[$r4d] $r2 $p0
-cvt rn f32 $r3 s8 3 $r0
-cvt rn f32 $r2 s8 2 $r0
-mul f32 $r3 $r3 0x3c010204
-cvt rn f32 $r1 s8 1 $r0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-mul f32 $r2 $r2 0x3c010204
-cvt rn f32 $r0 s8 0 $r0
-mul f32 $r1 $r1 0x3c010204
-mul f32 $r0 $r0 0x3c010204
-long ret
-// RGBA8_SINT
-$p1 suldgb b32 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p2 suldgb b32 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b32 $r0 cv zero u8 g[$r4d] $r2 $p0
-cvt s32 $r3 s8 3 $r0
-cvt s32 $r2 s8 2 $r0
-cvt s32 $r1 s8 1 $r0
-cvt s32 $r0 s8 0 $r0
-long ret
-// RGBA8_UINT
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb b32 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b32 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b32 $r0 cv zero u8 g[$r4d] $r2 $p0
-cvt u32 $r3 u8 3 $r0
-cvt u32 $r2 u8 2 $r0
-cvt u32 $r1 u8 1 $r0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-cvt u32 $r0 u8 0 $r0
-long ret
-// R5G6B5_UNORM
-$p1 suldgb u16 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb u16 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb u16 $r0 cv zero u8 g[$r4d] $r2 $p0
-ext u32 $r1 $r0 0x0605
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-long mov b32 $r3 0x3f800000
-ext u32 $r2 $r0 0x050b
-long and b32 $r0 $r0 0x1f
-cvt rn f32 $r2 u8 0 $r2
-cvt rn f32 $r1 u8 0 $r1
-mul f32 $r2 $r2 0x3d042108
-cvt rn f32 $r0 u8 0 $r0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-mul f32 $r1 $r1 0x3c820821
-mul f32 $r0 $r0 0x3d042108
-long ret
-// R5G5B5X1_UNORM
-$p1 suldgb u16 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb u16 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb u16 $r0 cv zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-ext u32 $r1 $r0 0x0505
-ext u32 $r2 $r0 0x050a
-long and b32 $r0 $r0 0x1f
-long mov b32 $r3 0x3f800000
-cvt rn f32 $r2 u8 0 $r2
-cvt rn f32 $r1 u8 0 $r1
-cvt rn f32 $r0 u8 0 $r0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-mul f32 $r2 $r2 0x3d042108
-mul f32 $r1 $r1 0x3d042108
-mul f32 $r0 $r0 0x3d042108
-long ret
-// RG16_UNORM
-$p1 suldgb b32 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b32 $r0 cg zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb b32 $r0 cv zero u8 g[$r4d] $r2 $p0
-cvt rn f32 $r1 u16 1 $r0
-cvt rn f32 $r0 u16 0 $r0
-mul f32 $r1 $r1 0x37800074
-mul f32 $r0 $r0 0x37800074
-long mov b32 $r2 0x00000000
-long mov b32 $r3 0x3f800000
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-long ret
-// RG16_SNORM
-$p1 suldgb b32 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b32 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b32 $r0 cv zero u8 g[$r4d] $r2 $p0
-mov b32 $r3 0x3f800000
-cvt rn f32 $r1 s16 1 $r0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-mov b32 $r2 0x00000000
-cvt rn f32 $r0 s16 0 $r0
-mul f32 $r1 $r1 0x38000187
-mul f32 $r0 $r0 0x38000187
-long ret
-// RG16_SINT
-$p1 suldgb b32 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p2 suldgb b32 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b32 $r0 cv zero u8 g[$r4d] $r2 $p0
-mov b32 $r3 0x00000001
-cvt s32 $r1 s16 1 $r0
-mov b32 $r2 0x00000000
-cvt s32 $r0 s16 0 $r0
-long ret
-// RG16_UINT
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb b32 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b32 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b32 $r0 cv zero u8 g[$r4d] $r2 $p0
-mov b32 $r3 0x00000001
-cvt u32 $r1 u16 1 $r0
-mov b32 $r2 0x00000000
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-cvt u32 $r0 u16 0 $r0
-long ret
-// RG16_FLOAT
-$p1 suldgb b32 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b32 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b32 $r0 cv zero u8 g[$r4d] $r2 $p0
-mov b32 $r3 0x3f800000
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-cvt f32 $r1 f16 $r0 1
-mov b32 $r2 0x00000000
-cvt f32 $r0 f16 $r0 0
-long ret
-// R32_FLOAT
-$p1 suldgb b32 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b32 $r0 cg zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb b32 $r0 cv zero u8 g[$r4d] $r2 $p0
-long mov b32 $r3 0x3f800000
-long mov b32 $r2 0x00000000
-long mov b32 $r1 0x00000000
-long ret
-// R32_xINT
-$p1 suldgb b32 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p2 suldgb b32 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b32 $r0 cv zero u8 g[$r4d] $r2 $p0
-long mov b32 $r3 0x00000001
-long mov b32 $r2 0x00000000
-long mov b32 $r1 0x00000000
-long ret
-// RG8_UNORM
-$p1 suldgb u16 $r0 ca zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb u16 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb u16 $r0 cv zero u8 g[$r4d] $r2 $p0
-mov b32 $r3 0x3f800000
-cvt rn f32 $r1 u8 1 $r0
-mov b32 $r2 0x00000000
-cvt rn f32 $r0 u8 0 $r0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-mul f32 $r1 $r1 0x3b808081
-mul f32 $r0 $r0 0x3b808081
-long ret
-// RG8_SNORM
-$p1 suldgb u16 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb u16 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb u16 $r0 cv zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-long mov b32 $r3 0x3f800000
-cvt rn f32 $r1 s8 1 $r0
-long mov b32 $r2 0x00000000
-cvt rn f32 $r0 s8 0 $r0
-mul f32 $r1 $r1 0x3c010204
-mul f32 $r0 $r0 0x3c010204
-long ret
-// RG8_UINT
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb u16 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb u16 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb u16 $r0 cv zero u8 g[$r4d] $r2 $p0
-long mov b32 $r3 0x00000001
-cvt u32 $r1 u8 1 $r0
-long mov b32 $r2 0x00000000
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-cvt u32 $r0 u8 0 $r0
-long ret
-// RG8_SINT
-$p1 suldgb u16 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb u16 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb u16 $r0 cv zero u8 g[$r4d] $r2 $p0
-long mov b32 $r3 0x00000001
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-cvt s32 $r1 s8 1 $r0
-long mov b32 $r2 0x00000000
-cvt s32 $r0 s8 0 $r0
-long ret
-// R16_UNORM
-$p1 suldgb u16 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb u16 $r0 cg zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb u16 $r0 cv zero u8 g[$r4d] $r2 $p0
-long mov b32 $r3 0x3f800000
-cvt rn f32 $r0 u16 0 $r0
-long mov b32 $r2 0x00000000
-long mov b32 $r1 0x00000000
-mul f32 $r0 $r0 0x37800074
-long ret
-// R16_SNORM
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb u16 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb u16 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb u16 $r0 cv zero u8 g[$r4d] $r2 $p0
-mov b32 $r3 0x3f800000
-cvt rn f32 $r0 s16 0 $r0
-long mov b32 $r2 0x00000000
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-long mov b32 $r1 0x00000000
-mul f32 $r0 $r0 0x38000187
-long ret
-// R16_SINT
-$p1 suldgb s16 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb s16 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb s16 $r0 cv zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-long mov b32 $r3 0x00000001
-long mov b32 $r2 0x00000000
-long mov b32 $r1 0x00000000
-long ret
-// R16_UINT
-$p1 suldgb u16 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb u16 $r0 cg zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb u16 $r0 cv zero u8 g[$r4d] $r2 $p0
-long mov b32 $r3 0x00000001
-long mov b32 $r2 0x00000000
-long mov b32 $r1 0x00000000
-long ret
-// R16_FLOAT
-$p1 suldgb u16 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p2 suldgb u16 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb u16 $r0 cv zero u8 g[$r4d] $r2 $p0
-long mov b32 $r3 0x3f800000
-long mov b32 $r2 0x00000000
-cvt f32 $r0 f16 $r0 0
-mov b32 $r1 0x00000000
-long ret
-// R8_UNORM
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb u8 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb u8 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb u8 $r0 cv zero u8 g[$r4d] $r2 $p0
-mov b32 $r3 0x3f800000
-cvt rn f32 $r0 u8 0 $r0
-mov b32 $r2 0x00000000
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-mul f32 $r0 $r0 0x3b808081
-mov b32 $r1 0x00000000
-long ret
-// R8_SNORM
-$p1 suldgb u8 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb u8 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb u8 $r0 cv zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-mov b32 $r3 0x3f800000
-cvt rn f32 $r0 s8 0 $r0
-mov b32 $r2 0x00000000
-mul f32 $r0 $r0 0x3c010204
-mov b32 $r1 0x00000000
-long ret
-// R8_SINT
-$p1 suldgb s8 $r0 ca zero u8 g[$r4d] $r2 $p0
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb s8 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb s8 $r0 cv zero u8 g[$r4d] $r2 $p0
-long mov b32 $r3 0x00000001
-long mov b32 $r2 0x00000000
-long mov b32 $r1 0x00000000
-long ret
-// R8_UINT
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-$p1 suldgb u8 $r0 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb u8 $r0 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb u8 $r0 cv zero u8 g[$r4d] $r2 $p0
-long mov b32 $r3 0x00000001
-long mov b32 $r2 0x00000000
-long mov b32 $r1 0x00000000
-sched 0x00 0x00 0x00 0x00 0x00 0x00 0x00
-long ret
-// R11G11B10_FLOAT TODO
-$p1 suldgb b32 $r3 ca zero u8 g[$r4d] $r2 $p0
-set $p1 0x1 $p1 xor not $p2
-$p2 suldgb b32 $r3 cg zero u8 g[$r4d] $r2 $p0
-$p1 suldgb b32 $r3 cv zero u8 g[$r4d] $r2 $p0
-long mov b32 $r3 0x3f800000
-long nop
-long ret
-
-
// RCP F64: Newton Raphson reciprocal(x): r_{i+1} = r_i * (2.0 - x * r_i)
//
// INPUT: $r0d (x)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
index d36cea7..7c3bb40 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
@@ -755,7 +755,6 @@ nve4_set_tex_handles(struct nvc0_context *nvc0)
static const uint8_t nve4_su_format_map[PIPE_FORMAT_COUNT];
static const uint16_t nve4_su_format_aux_map[PIPE_FORMAT_COUNT];
-static const uint16_t nve4_suldp_lib_offset[PIPE_FORMAT_COUNT];
static void
nvc0_get_surface_dims(struct pipe_image_view *view, int *width, int *height,
@@ -798,7 +797,6 @@ nve4_set_surface_info(struct nouveau_pushbuf *push,
struct pipe_image_view *view,
struct nvc0_context *nvc0)
{
- struct nvc0_screen *screen = nvc0->screen;
struct nv04_resource *res;
uint64_t address;
uint32_t *const info = push->cur;
@@ -815,8 +813,6 @@ nve4_set_surface_info(struct nouveau_pushbuf *push,
info[0] = 0xbadf0000;
info[1] = 0x80004000;
- info[12] = nve4_suldp_lib_offset[PIPE_FORMAT_R32G32B32A32_UINT] +
- screen->lib_code->start;
return;
}
res = nv04_resource(view->resource);
@@ -1223,51 +1219,3 @@ static const uint16_t nve4_su_format_aux_map[PIPE_FORMAT_COUNT] =
[PIPE_FORMAT_R8_SINT] = 0x0206,
[PIPE_FORMAT_R8_UINT] = 0x0206
};
-
-/* NOTE: These are hardcoded offsets for the shader library.
- * TODO: Automate them.
- */
-static const uint16_t nve4_suldp_lib_offset[PIPE_FORMAT_COUNT] =
-{
- [PIPE_FORMAT_R32G32B32A32_FLOAT] = 0x218,
- [PIPE_FORMAT_R32G32B32A32_SINT] = 0x218,
- [PIPE_FORMAT_R32G32B32A32_UINT] = 0x218,
- [PIPE_FORMAT_R16G16B16A16_UNORM] = 0x248,
- [PIPE_FORMAT_R16G16B16A16_SNORM] = 0x2b8,
- [PIPE_FORMAT_R16G16B16A16_SINT] = 0x330,
- [PIPE_FORMAT_R16G16B16A16_UINT] = 0x388,
- [PIPE_FORMAT_R16G16B16A16_FLOAT] = 0x3d8,
- [PIPE_FORMAT_R32G32_FLOAT] = 0x428,
- [PIPE_FORMAT_R32G32_SINT] = 0x468,
- [PIPE_FORMAT_R32G32_UINT] = 0x468,
- [PIPE_FORMAT_R10G10B10A2_UNORM] = 0x4a8,
- [PIPE_FORMAT_R10G10B10A2_UINT] = 0x530,
- [PIPE_FORMAT_R8G8B8A8_UNORM] = 0x588,
- [PIPE_FORMAT_R8G8B8A8_SNORM] = 0x5f8,
- [PIPE_FORMAT_R8G8B8A8_SINT] = 0x670,
- [PIPE_FORMAT_R8G8B8A8_UINT] = 0x6c8,
- [PIPE_FORMAT_B5G6R5_UNORM] = 0x718,
- [PIPE_FORMAT_B5G5R5X1_UNORM] = 0x7a0,
- [PIPE_FORMAT_R16G16_UNORM] = 0x828,
- [PIPE_FORMAT_R16G16_SNORM] = 0x890,
- [PIPE_FORMAT_R16G16_SINT] = 0x8f0,
- [PIPE_FORMAT_R16G16_UINT] = 0x948,
- [PIPE_FORMAT_R16G16_FLOAT] = 0x998,
- [PIPE_FORMAT_R32_FLOAT] = 0x9e8,
- [PIPE_FORMAT_R32_SINT] = 0xa30,
- [PIPE_FORMAT_R32_UINT] = 0xa30,
- [PIPE_FORMAT_R8G8_UNORM] = 0xa78,
- [PIPE_FORMAT_R8G8_SNORM] = 0xae0,
- [PIPE_FORMAT_R8G8_UINT] = 0xb48,
- [PIPE_FORMAT_R8G8_SINT] = 0xb98,
- [PIPE_FORMAT_R16_UNORM] = 0xbe8,
- [PIPE_FORMAT_R16_SNORM] = 0xc48,
- [PIPE_FORMAT_R16_SINT] = 0xca0,
- [PIPE_FORMAT_R16_UINT] = 0xce8,
- [PIPE_FORMAT_R16_FLOAT] = 0xd30,
- [PIPE_FORMAT_R8_UNORM] = 0xd88,
- [PIPE_FORMAT_R8_SNORM] = 0xde0,
- [PIPE_FORMAT_R8_SINT] = 0xe38,
- [PIPE_FORMAT_R8_UINT] = 0xe88,
- [PIPE_FORMAT_R11G11B10_FLOAT] = 0xed0
-};
--
2.8.3
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