[Mesa-dev] [PATCH v2 00/13] i965: Rework CS local IDs for gen7+

[Jordan Justen]

git://people.freedesktop.org/~jljusten/mesa hsw-cs-cross-thread-constants-v2

v2:
 * Add v1 feedback (as noted in patch commit messaged)
 * Add vulkan support

Tested with curro's simd32 CS series. The IDs appear to be working
with simd32, and the UE4 elemental ran with INTEL_DEBUG=do32. (Tested
on Broadwell)

The v1 cover letter has some additional information:

https://lists.freedesktop.org/archives/mesa-dev/2016-May/117952.html

Jordan Justen (13):
  glsl: Add glsl LowerCsDerivedVariables option
  nir: Make lowering gl_LocalInvocationIndex optional
  i965: Add nir channel_num system value
  i965: Add nir based intrinsic lowering and thread ID uniform
  i965: Track and place CS thread ID uniform
  i965: Store number of threads in brw_cs_prog_data
  i965: Add CS push constant info to brw_cs_prog_data
  anv: Add push constant uniforms and lower uniforms
  squash-fwd i965: Support new thread ID push constant & cross-thread
    constants
  squash i965: Use nir to lower cs-derived variables
  squash i965: Run the intrinsics lowering pass
  squash i965: Remove old CS local ID handling
  squash anv: Support new local ID generation & cross-thread constants

 src/compiler/glsl/builtin_variables.cpp        |  29 ++--
 src/compiler/glsl/glsl_parser_extras.cpp       |   2 +-
 src/compiler/glsl/ir.h                         |   3 +-
 src/compiler/nir/nir.c                         |   4 +
 src/compiler/nir/nir.h                         |   2 +
 src/compiler/nir/nir_gather_info.c             |   1 +
 src/compiler/nir/nir_intrinsics.h              |   2 +
 src/compiler/nir/nir_lower_system_values.c     |  16 +-
 src/intel/vulkan/anv_cmd_buffer.c              |  52 ++++---
 src/intel/vulkan/anv_pipeline.c                |  36 ++++-
 src/intel/vulkan/anv_private.h                 |   1 -
 src/intel/vulkan/gen7_cmd_buffer.c             |  10 +-
 src/intel/vulkan/gen8_cmd_buffer.c             |  13 +-
 src/intel/vulkan/genX_cmd_buffer.c             |   4 +-
 src/intel/vulkan/genX_pipeline.c               |  12 +-
 src/mesa/drivers/dri/i965/Makefile.sources     |   1 +
 src/mesa/drivers/dri/i965/brw_compiler.c       |   3 +-
 src/mesa/drivers/dri/i965/brw_compiler.h       |  22 ++-
 src/mesa/drivers/dri/i965/brw_defines.h        |   3 +
 src/mesa/drivers/dri/i965/brw_fs.cpp           | 207 ++++++++++++++-----------
 src/mesa/drivers/dri/i965/brw_fs.h             |   1 -
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp       |  22 ++-
 src/mesa/drivers/dri/i965/brw_nir.h            |   1 +
 src/mesa/drivers/dri/i965/brw_nir_intrinsics.c | 163 +++++++++++++++++++
 src/mesa/drivers/dri/i965/brw_program.c        |   1 +
 src/mesa/drivers/dri/i965/gen7_cs_state.c      | 122 +++++++--------
 src/mesa/main/mtypes.h                         |   3 +
 src/mesa/state_tracker/st_extensions.c         |   4 +-
 28 files changed, 490 insertions(+), 250 deletions(-)
 create mode 100644 src/mesa/drivers/dri/i965/brw_nir_intrinsics.c

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2.8.1