[Mesa-dev] [PATCH 1/3] r600g: only do necessary cache flushes in cp_dma_clear_buffer

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

The main impact is that fast color clear doesn't flush TC, CONST, DB.
---
 src/gallium/drivers/r600/evergreen_hw_context.c | 18 +++---------------
 src/gallium/drivers/r600/r600_blit.c            |  2 +-
 src/gallium/drivers/r600/r600_pipe.h            | 20 +++++++++++++++++++-
 3 files changed, 23 insertions(+), 17 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c b/src/gallium/drivers/r600/evergreen_hw_context.c
index 14877ae..32f3979 100644
--- a/src/gallium/drivers/r600/evergreen_hw_context.c
+++ b/src/gallium/drivers/r600/evergreen_hw_context.c
@@ -85,7 +85,8 @@ void evergreen_dma_copy_buffer(struct r600_context *rctx,
 
 void evergreen_cp_dma_clear_buffer(struct r600_context *rctx,
 				   struct pipe_resource *dst, uint64_t offset,
-				   unsigned size, uint32_t clear_value)
+				   unsigned size, uint32_t clear_value,
+				   enum r600_coherency coher)
 {
 	struct radeon_winsys_cs *cs = rctx->b.gfx.cs;
 
@@ -101,15 +102,7 @@ void evergreen_cp_dma_clear_buffer(struct r600_context *rctx,
 	offset += r600_resource(dst)->gpu_address;
 
 	/* Flush the cache where the resource is bound. */
-	rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE |
-			 R600_CONTEXT_INV_VERTEX_CACHE |
-			 R600_CONTEXT_INV_TEX_CACHE |
-			 R600_CONTEXT_FLUSH_AND_INV |
-			 R600_CONTEXT_FLUSH_AND_INV_CB |
-			 R600_CONTEXT_FLUSH_AND_INV_DB |
-			 R600_CONTEXT_FLUSH_AND_INV_CB_META |
-			 R600_CONTEXT_FLUSH_AND_INV_DB_META |
-			 R600_CONTEXT_STREAMOUT_FLUSH |
+	rctx->b.flags |= r600_get_flush_flags(coher) |
 			 R600_CONTEXT_WAIT_3D_IDLE;
 
 	while (size) {
@@ -157,9 +150,4 @@ void evergreen_cp_dma_clear_buffer(struct r600_context *rctx,
 		radeon_emit(cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0));
 		radeon_emit(cs, 0);
 	}
-
-	/* Invalidate the read caches. */
-	rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE |
-			 R600_CONTEXT_INV_VERTEX_CACHE |
-			 R600_CONTEXT_INV_TEX_CACHE;
 }
diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c
index 9f309d8..336db36 100644
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -583,7 +583,7 @@ static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *ds
 	if (rctx->screen->b.has_cp_dma &&
 	    rctx->b.chip_class >= EVERGREEN &&
 	    offset % 4 == 0 && size % 4 == 0) {
-		evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value);
+		evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value, coher);
 	} else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) {
 		union pipe_color_union clear_value;
 		clear_value.ui[0] = value;
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index cdb8e82..debcd70 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -669,7 +669,8 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx,
 			     unsigned size);
 void evergreen_cp_dma_clear_buffer(struct r600_context *rctx,
 				   struct pipe_resource *dst, uint64_t offset,
-				   unsigned size, uint32_t clear_value);
+				   unsigned size, uint32_t clear_value,
+				   enum r600_coherency coher);
 void r600_dma_copy_buffer(struct r600_context *rctx,
 			  struct pipe_resource *dst,
 			  struct pipe_resource *src,
@@ -929,6 +930,23 @@ static inline bool r600_can_read_depth(struct r600_texture *rtex)
 		rtex->resource.b.b.format == PIPE_FORMAT_Z32_FLOAT);
 }
 
+static inline unsigned r600_get_flush_flags(enum r600_coherency coher)
+{
+	switch (coher) {
+	default:
+	case R600_COHERENCY_NONE:
+		return 0;
+	case R600_COHERENCY_SHADER:
+		return R600_CONTEXT_INV_CONST_CACHE |
+		       R600_CONTEXT_INV_VERTEX_CACHE |
+		       R600_CONTEXT_INV_TEX_CACHE |
+		       R600_CONTEXT_STREAMOUT_FLUSH;
+	case R600_COHERENCY_CB_META:
+		return R600_CONTEXT_FLUSH_AND_INV_CB |
+		       R600_CONTEXT_FLUSH_AND_INV_CB_META;
+	}
+}
+
 #define     V_028A6C_OUTPRIM_TYPE_POINTLIST            0
 #define     V_028A6C_OUTPRIM_TYPE_LINESTRIP            1
 #define     V_028A6C_OUTPRIM_TYPE_TRISTRIP             2
-- 
2.7.4