[Mesa-dev] [PATCH] radeonsi: Don't offset OFFCHIP_BUFFERING on pre-VI cards.

[Marek Olšák]

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

Marek

On Sun, May 29, 2016 at 9:40 PM, Bas Nieuwenhuizen
<bas at basnieuwenhuizen.nl> wrote:
> Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96239
> ---
>  src/gallium/drivers/radeonsi/si_state_shaders.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
> index 8ec0470..a7af76d 100644
> --- a/src/gallium/drivers/radeonsi/si_state_shaders.c
> +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
> @@ -1819,12 +1819,16 @@ static void si_init_tess_factor_ring(struct si_context *sctx)
>
>         /* Append these registers to the init config state. */
>         if (sctx->b.chip_class >= CIK) {
> +               unsigned offchip_buffering = offchip_blocks;
> +               if(sctx->b.chip_class >= VI)
> +                       --offchip_buffering;
> +
>                 si_pm4_set_reg(sctx->init_config, R_030938_VGT_TF_RING_SIZE,
>                                S_030938_SIZE(sctx->tf_ring->width0 / 4));
>                 si_pm4_set_reg(sctx->init_config, R_030940_VGT_TF_MEMORY_BASE,
>                                r600_resource(sctx->tf_ring)->gpu_address >> 8);
>                 si_pm4_set_reg(sctx->init_config, R_03093C_VGT_HS_OFFCHIP_PARAM,
> -                            S_03093C_OFFCHIP_BUFFERING(offchip_blocks - 1) |
> +                            S_03093C_OFFCHIP_BUFFERING(offchip_buffering) |
>                              S_03093C_OFFCHIP_GRANULARITY(V_03093C_X_8K_DWORDS));
>         } else {
>                 si_pm4_set_reg(sctx->init_config, R_008988_VGT_TF_RING_SIZE,
> @@ -1832,7 +1836,7 @@ static void si_init_tess_factor_ring(struct si_context *sctx)
>                 si_pm4_set_reg(sctx->init_config, R_0089B8_VGT_TF_MEMORY_BASE,
>                                r600_resource(sctx->tf_ring)->gpu_address >> 8);
>                 si_pm4_set_reg(sctx->init_config, R_0089B0_VGT_HS_OFFCHIP_PARAM,
> -                              S_0089B0_OFFCHIP_BUFFERING(offchip_blocks - 1));
> +                              S_0089B0_OFFCHIP_BUFFERING(offchip_blocks));
>         }
>
>         /* Flush the context to re-emit the init_config state.
> --
> 2.8.3
>
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