[Mesa-dev] [v2 22.1/26] i965: Apply non-msrt mcs array/mipmap horizontal alignment rules

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
CC: Jason Ekstrand <jason at jlekstrand.net>
---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 35 ++++++++++++++++++++++++---
 1 file changed, 32 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 7a03597..357e587 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1566,6 +1566,35 @@ intel_miptree_alloc_mcs(struct brw_context *brw,
    return mt->mcs_mt;
 }
 
+static unsigned 
+intel_miptree_non_msrt_aligned_width(const struct brw_context *brw,
+                                     const struct intel_mipmap_tree *mt)
+{
+   const bool mip_mapped = mt->first_level != 0 || mt->last_level != 0;
+
+   if (!mip_mapped)
+      return mt->logical_width0;
+
+   if (brw->gen < 8)
+      unreachable("mipmapped fast clear is only supported for gen8+");
+
+   /* From the BSpec: GT - Shared Functions - vol5c Shared Functions -
+    * RENDER_SURFACE_STATE [BDW+] Issues Info 2:
+    *
+    * PRE-SKL
+    * For non-multisampled render target's auxiliary surface, MCS, QPitch
+    * must be computed with Horizontal Alignment = 256 and Surface Vertical
+    * Alignment = 128. These alignments are only for MCS buffer and not for
+    * associated render target.
+    *
+    * SKL+
+    * For non-multisampled render target's CCS auxiliary surface, QPitch
+    * must be computed with Horizontal Alignment = 128 and Surface Vertical
+    * Alignment = 256. These alignments are only for CCS buffer and not for
+    * associated render target.
+    */
+   return ALIGN(mt->logical_width0, brw->gen >= 9 ? 128 : 256);
+}
 
 bool
 intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,
@@ -1602,9 +1631,9 @@ intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,
    if (brw->gen >= 9)
       height_divisor /= 2;
 
-   unsigned mcs_width =
-      ALIGN(mt->logical_width0, width_divisor) / width_divisor;
-   unsigned mcs_height =
+   const unsigned width = intel_miptree_non_msrt_aligned_width(brw, mt);
+   const unsigned mcs_width = ALIGN(width, width_divisor) / width_divisor;
+   const unsigned mcs_height =
       ALIGN(mt->logical_height0, height_divisor) / height_divisor;
    assert(mt->logical_depth0 == 1);
    uint32_t layout_flags = MIPTREE_LAYOUT_TILING_Y;
-- 
2.5.5