[Mesa-dev] [PATCH] radv: emit correct last export when Z/stencil export is enabled

[Bas Nieuwenhuizen]

Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

On Tue, Nov 8, 2016 at 7:24 AM, Dave Airlie <airlied at gmail.com> wrote:
> From: Dave Airlie <airlied at redhat.com>
>
> I was getting a random GPU hang in the renderpass simple tests,
> it turns out sometimes radv emitted the wrong thing "last".
>
> This fixes the logic to emit Z/stencil last if they occur,
> and not mark a color output as last. Also this relies on the
> Z/STENCIL being the first two fragment outputs, which they are
> so yay.
>
> Fixes: dEQP-VK.renderpass.simple.color_depth (random hangs)
> Cc: "13.0" <mesa-stable at lists.freedesktop.org>
> Signed-off-by: Dave Airlie <airlied at redhat.com>
> ---
>  src/amd/common/ac_nir_to_llvm.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index 9b2663e..c8ee784 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -4378,12 +4378,10 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx,
>
>         for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
>                 LLVMValueRef values[4];
> -               bool last;
> +
>                 if (!(ctx->output_mask & (1ull << i)))
>                         continue;
>
> -               last = ctx->output_mask <= ((1ull << (i + 1)) - 1);
> -
>                 if (i == FRAG_RESULT_DEPTH) {
>                         ctx->shader_info->fs.writes_z = true;
>                         depth = to_float(ctx, LLVMBuildLoad(ctx->builder,
> @@ -4393,10 +4391,14 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx,
>                         stencil = to_float(ctx, LLVMBuildLoad(ctx->builder,
>                                                               ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
>                 } else {
> +                       bool last = false;
>                         for (unsigned j = 0; j < 4; j++)
>                                 values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
>                                                                         ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
>
> +                       if (!ctx->shader_info->fs.writes_z && !ctx->shader_info->fs.writes_stencil)
> +                               last = ctx->output_mask <= ((1ull << (i + 1)) - 1);
> +
>                         si_export_mrt_color(ctx, values, V_008DFC_SQ_EXP_MRT + index, last);
>                         index++;
>                 }
> --
> 2.5.5
>
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