[Mesa-dev] [PATCH] radeonsi: fix/silence unused variable warnings in optimized builds

[Nicolai Hähnle]

From: Nicolai Hähnle <nicolai.haehnle at amd.com>

I'm leaving num_out_sgpr around since it's not in a fast path, and besides
the compiler should be able to optimize it away easily. The alternative
with #if/#endif would be extremely ugly.
---
 src/gallium/drivers/radeonsi/si_dma.c    | 3 +--
 src/gallium/drivers/radeonsi/si_shader.c | 3 ++-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_dma.c b/src/gallium/drivers/radeonsi/si_dma.c
index dee5ec5..8d186c3 100644
--- a/src/gallium/drivers/radeonsi/si_dma.c
+++ b/src/gallium/drivers/radeonsi/si_dma.c
@@ -91,37 +91,36 @@ static void si_dma_copy_tile(struct si_context *ctx,
 			     unsigned src_y,
 			     unsigned src_z,
 			     unsigned copy_height,
 			     unsigned pitch,
 			     unsigned bpp)
 {
 	struct radeon_winsys_cs *cs = ctx->b.dma.cs;
 	struct r600_texture *rsrc = (struct r600_texture*)src;
 	struct r600_texture *rdst = (struct r600_texture*)dst;
 	unsigned dst_mode = rdst->surface.level[dst_level].mode;
-	unsigned src_mode = rsrc->surface.level[src_level].mode;
 	bool detile = dst_mode == RADEON_SURF_MODE_LINEAR_ALIGNED;
 	struct r600_texture *rlinear = detile ? rdst : rsrc;
 	struct r600_texture *rtiled = detile ? rsrc : rdst;
 	unsigned linear_lvl = detile ? dst_level : src_level;
 	unsigned tiled_lvl = detile ? src_level : dst_level;
 	struct radeon_info *info = &ctx->screen->b.info;
 	unsigned index = rtiled->surface.tiling_index[tiled_lvl];
 	unsigned tile_mode = info->si_tile_mode_array[index];
 	unsigned array_mode, lbpp, pitch_tile_max, slice_tile_max, size;
 	unsigned ncopy, height, cheight, i;
 	unsigned linear_x, linear_y, linear_z,  tiled_x, tiled_y, tiled_z;
 	unsigned sub_cmd, bank_h, bank_w, mt_aspect, nbanks, tile_split, mt;
 	uint64_t base, addr;
 	unsigned pipe_config;
 
-	assert(dst_mode != src_mode);
+	assert(dst_mode != rsrc->surface.level[src_level].mode);
 
 	sub_cmd = SI_DMA_COPY_TILED;
 	lbpp = util_logbase2(bpp);
 	pitch_tile_max = ((pitch / bpp) / 8) - 1;
 
 	linear_x = detile ? dst_x : src_x;
 	linear_y = detile ? dst_y : src_y;
 	linear_z = detile ? dst_z : src_z;
 	tiled_x = detile ? src_x : dst_x;
 	tiled_y = detile ? src_y : dst_y;
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index b170eb9..86dd9d5 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -6865,21 +6865,22 @@ static void si_build_wrapper_function(struct si_shader_context *ctx,
 				      unsigned num_parts,
 				      unsigned main_part)
 {
 	struct gallivm_state *gallivm = &ctx->gallivm;
 	LLVMBuilderRef builder = ctx->gallivm.builder;
 	/* PS epilog has one arg per color component */
 	LLVMTypeRef param_types[48];
 	LLVMValueRef out[48];
 	LLVMTypeRef function_type;
 	unsigned num_params;
-	unsigned num_out_sgpr, num_out;
+	unsigned num_out;
+	MAYBE_UNUSED unsigned num_out_sgpr; /* used in debug checks */
 	unsigned num_sgprs, num_vgprs;
 	unsigned last_sgpr_param;
 	unsigned gprs;
 
 	for (unsigned i = 0; i < num_parts; ++i) {
 		LLVMAddFunctionAttr(parts[i], LLVMAlwaysInlineAttribute);
 		LLVMSetLinkage(parts[i], LLVMPrivateLinkage);
 	}
 
 	/* The parameters of the wrapper function correspond to those of the
-- 
2.7.4