[Mesa-dev] [PATCH 50/70] i965: make use of new is_arb_asm flag

[Timothy Arceri]

---
 src/mesa/drivers/dri/i965/brw_vs.c | 15 +++++++--------
 src/mesa/drivers/dri/i965/brw_wm.c | 13 ++++++-------
 2 files changed, 13 insertions(+), 15 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index 3612385..9d3b685 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -156,7 +156,7 @@ brw_codegen_vs_prog(struct brw_context *brw,
    memset(&prog_data, 0, sizeof(prog_data));
 
    /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
-   if (!prog)
+   if (vp->program.is_arb_asm)
       stage_prog_data->use_alt_mode = true;
 
    mem_ctx = ralloc_context(NULL);
@@ -187,7 +187,7 @@ brw_codegen_vs_prog(struct brw_context *brw,
                     stage_prog_data->nr_image_params);
    stage_prog_data->nr_params = param_count;
 
-   if (prog) {
+   if (!vp->program.is_arb_asm) {
       brw_nir_setup_glsl_uniforms(vp->program.nir, &vp->program,
                                   &prog_data.base.base,
                                   compiler->scalar_stage[MESA_SHADER_VERTEX]);
@@ -212,8 +212,8 @@ brw_codegen_vs_prog(struct brw_context *brw,
    bool is_tes_linked =
       vp->program.sh.data->linked_stages & 1 << MESA_SHADER_TESS_EVAL;
    brw_compute_vue_map(devinfo, &prog_data.base.vue_map, outputs_written,
-                       prog ? vp->program.info.separate_shader ||
-                          is_tes_linked : false);
+                       vp->program.is_arb_asm ? false :
+                          vp->program.info.separate_shader || is_tes_linked);
 
    if (0) {
       _mesa_fprint_program_opt(stderr, &vp->program, PROG_PRINT_DEBUG, true);
@@ -226,7 +226,7 @@ brw_codegen_vs_prog(struct brw_context *brw,
    }
 
    if (unlikely(INTEL_DEBUG & DEBUG_VS)) {
-      if (!prog)
+      if (vp->program.is_arb_asm)
          brw_dump_arb_asm("vertex", &vp->program);
 
       fprintf(stderr, "VS Output ");
@@ -235,9 +235,8 @@ brw_codegen_vs_prog(struct brw_context *brw,
 
    int st_index = -1;
    if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
-      bool is_glsl_sh = prog != NULL;
       st_index = brw_get_shader_time_index(brw, &vp->program, ST_VS,
-                                           is_glsl_sh);
+                                           !vp->program.is_arb_asm);
    }
 
    /* Emit GEN4 code.
@@ -249,7 +248,7 @@ brw_codegen_vs_prog(struct brw_context *brw,
                             !_mesa_is_gles3(&brw->ctx),
                             st_index, &program_size, &error_str);
    if (program == NULL) {
-      if (prog) {
+      if (!vp->program.is_arb_asm) {
          vp->program.sh.data->LinkStatus = false;
          ralloc_strcat(&vp->program.sh.data->InfoLog, error_str);
       }
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 87c3507..e91ffe9 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -152,7 +152,7 @@ brw_codegen_wm_prog(struct brw_context *brw,
    memset(&prog_data, 0, sizeof(prog_data));
 
    /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
-   if (!prog)
+   if (fp->program.is_arb_asm)
       prog_data.base.use_alt_mode = true;
 
    assign_fs_binding_table_offsets(devinfo, &fp->program, key, &prog_data);
@@ -174,7 +174,7 @@ brw_codegen_wm_prog(struct brw_context *brw,
                     prog_data.base.nr_image_params);
    prog_data.base.nr_params = param_count;
 
-   if (prog) {
+   if (!fp->program.is_arb_asm) {
       brw_nir_setup_glsl_uniforms(fp->program.nir, &fp->program,
                                   &prog_data.base, true);
    } else {
@@ -193,11 +193,10 @@ brw_codegen_wm_prog(struct brw_context *brw,
 
    int st_index8 = -1, st_index16 = -1;
    if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
-      bool is_glsl_sh = prog != NULL;
       st_index8 = brw_get_shader_time_index(brw, &fp->program, ST_FS8,
-                                            is_glsl_sh);
+                                            !fp->program.is_arb_asm);
       st_index16 = brw_get_shader_time_index(brw, &fp->program, ST_FS16,
-                                             is_glsl_sh);
+                                             !fp->program.is_arb_asm);
    }
 
    char *error_str = NULL;
@@ -208,7 +207,7 @@ brw_codegen_wm_prog(struct brw_context *brw,
                             &program_size, &error_str);
 
    if (program == NULL) {
-      if (prog) {
+      if (!fp->program.is_arb_asm) {
          fp->program.sh.data->LinkStatus = false;
          ralloc_strcat(&fp->program.sh.data->InfoLog, error_str);
       }
@@ -234,7 +233,7 @@ brw_codegen_wm_prog(struct brw_context *brw,
                            prog_data.base.total_scratch,
                            devinfo->max_wm_threads);
 
-   if (unlikely((INTEL_DEBUG & DEBUG_WM) && !prog))
+   if (unlikely((INTEL_DEBUG & DEBUG_WM) && fp->program.is_arb_asm))
       fprintf(stderr, "\n");
 
    brw_upload_cache(&brw->cache, BRW_CACHE_FS_PROG,
-- 
2.7.4