[Mesa-dev] [PATCH 10/20] intel/genxml: Make some 3DSTATE_PS fields more consistent

[Jason Ekstrand]

---
 src/intel/blorp/blorp_genX_exec.h | 8 ++++----
 src/intel/genxml/gen6.xml         | 6 +++---
 src/intel/genxml/gen7.xml         | 6 +++---
 src/intel/genxml/gen75.xml        | 6 +++---
 src/intel/vulkan/gen7_pipeline.c  | 6 +++---
 5 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index 07c335a..4a98371 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -630,9 +630,9 @@ blorp_emit_ps_config(struct blorp_batch *batch,
 #endif
 
       if (prog_data) {
-         ps.DispatchGRFStartRegisterforConstantSetupData0 =
+         ps.DispatchGRFStartRegisterForConstantSetupData0 =
             prog_data->base.dispatch_grf_start_reg;
-         ps.DispatchGRFStartRegisterforConstantSetupData2 =
+         ps.DispatchGRFStartRegisterForConstantSetupData2 =
             prog_data->dispatch_grf_start_reg_2;
 
          ps.KernelStartPointer0 = params->wm_prog_kernel;
@@ -692,9 +692,9 @@ blorp_emit_ps_config(struct blorp_batch *batch,
       if (prog_data) {
          wm.ThreadDispatchEnable = true;
 
-         wm.DispatchGRFStartRegisterforConstantSetupData0 =
+         wm.DispatchGRFStartRegisterForConstantSetupData0 =
             prog_data->base.dispatch_grf_start_reg;
-         wm.DispatchGRFStartRegisterforConstantSetupData2 =
+         wm.DispatchGRFStartRegisterForConstantSetupData2 =
             prog_data->dispatch_grf_start_reg_2;
 
          wm.KernelStartPointer0 = params->wm_prog_kernel;
diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index ad130d9..60e403a 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -1459,9 +1459,9 @@
     <field name="Depth Buffer Clear" start="158" end="158" type="bool"/>
     <field name="Depth Buffer Resolve Enable" start="156" end="156" type="bool"/>
     <field name="Hierarchical Depth Buffer Resolve Enable" start="155" end="155" type="bool"/>
-    <field name="Dispatch GRF Start Register for Constant/Setup Data [0]" start="144" end="150" type="uint"/>
-    <field name="Dispatch GRF Start Register for Constant/Setup Data [1]" start="136" end="142" type="uint"/>
-    <field name="Dispatch GRF Start Register for Constant/Setup Data [2]" start="128" end="134" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data [0]" start="144" end="150" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data [1]" start="136" end="142" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data [2]" start="128" end="134" type="uint"/>
     <field name="Maximum Number of Threads" start="185" end="191" type="uint"/>
     <field name="Legacy Diamond Line Rasterization" start="183" end="183" type="bool"/>
     <field name="Pixel Shader Kill Pixel" start="182" end="182" type="bool"/>
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 9bf3814..7ac421f 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -1393,9 +1393,9 @@
     <field name="32 Pixel Dispatch Enable" start="130" end="130" type="bool"/>
     <field name="16 Pixel Dispatch Enable" start="129" end="129" type="bool"/>
     <field name="8 Pixel Dispatch Enable" start="128" end="128" type="bool"/>
-    <field name="Dispatch GRF Start Register for Constant/Setup Data [0]" start="176" end="182" type="uint"/>
-    <field name="Dispatch GRF Start Register for Constant/Setup Data [1]" start="168" end="174" type="uint"/>
-    <field name="Dispatch GRF Start Register for Constant/Setup Data [2]" start="160" end="166" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data [0]" start="176" end="182" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data [1]" start="168" end="174" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data [2]" start="160" end="166" type="uint"/>
     <field name="Kernel Start Pointer[1]" start="198" end="223" type="offset"/>
     <field name="Kernel Start Pointer[2]" start="230" end="255" type="offset"/>
   </instruction>
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 124cb1e..1f8d77a 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -1624,9 +1624,9 @@
     <field name="32 Pixel Dispatch Enable" start="130" end="130" type="bool"/>
     <field name="16 Pixel Dispatch Enable" start="129" end="129" type="bool"/>
     <field name="8 Pixel Dispatch Enable" start="128" end="128" type="bool"/>
-    <field name="Dispatch GRF Start Register for Constant/Setup Data [0]" start="176" end="182" type="uint"/>
-    <field name="Dispatch GRF Start Register for Constant/Setup Data [1]" start="168" end="174" type="uint"/>
-    <field name="Dispatch GRF Start Register for Constant/Setup Data [2]" start="160" end="166" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data [0]" start="176" end="182" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data [1]" start="168" end="174" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data [2]" start="160" end="166" type="uint"/>
     <field name="Kernel Start Pointer[1]" start="198" end="223" type="offset"/>
     <field name="Kernel Start Pointer[2]" start="230" end="255" type="offset"/>
   </instruction>
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 3765d14..40e1d81 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -168,10 +168,10 @@ genX(graphics_pipeline_create)(
          ps._16PixelDispatchEnable        = wm_prog_data->dispatch_16;
          ps._8PixelDispatchEnable         = wm_prog_data->dispatch_8;
 
-         ps.DispatchGRFStartRegisterforConstantSetupData0 =
+         ps.DispatchGRFStartRegisterForConstantSetupData0 =
             wm_prog_data->base.dispatch_grf_start_reg,
-         ps.DispatchGRFStartRegisterforConstantSetupData1 = 0,
-         ps.DispatchGRFStartRegisterforConstantSetupData2 =
+         ps.DispatchGRFStartRegisterForConstantSetupData1 = 0,
+         ps.DispatchGRFStartRegisterForConstantSetupData2 =
             wm_prog_data->dispatch_grf_start_reg_2;
 
          /* Haswell requires the sample mask to be set in this packet as well as
-- 
2.5.0.400.gff86faf