[Mesa-dev] [PATCH 14/20] radeonsi: don't set vs.epilog.export_prim_id if TES is bound

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

there is no VS epilog in this case
---
 src/gallium/drivers/radeonsi/si_state_shaders.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 9df8f47..72d0518 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -874,24 +874,24 @@ static inline void si_shader_selector_key(struct pipe_context *ctx,
 					sctx->vertex_elements->elements[i].instance_divisor;
 
 			key->mono.vs.fix_fetch =
 				sctx->vertex_elements->fix_fetch &
 				u_bit_consecutive(0, 2 * count);
 		}
 		if (sctx->tes_shader.cso)
 			key->as_ls = 1;
 		else if (sctx->gs_shader.cso)
 			key->as_es = 1;
-
-		if (!sctx->gs_shader.cso && sctx->ps_shader.cso &&
-		    sctx->ps_shader.cso->info.uses_primid)
-			key->part.vs.epilog.export_prim_id = 1;
+		else {
+			if (sctx->ps_shader.cso && sctx->ps_shader.cso->info.uses_primid)
+				key->part.vs.epilog.export_prim_id = 1;
+		}
 		break;
 	case PIPE_SHADER_TESS_CTRL:
 		key->part.tcs.epilog.prim_mode =
 			sctx->tes_shader.cso->info.properties[TGSI_PROPERTY_TES_PRIM_MODE];
 
 		if (sel == sctx->fixed_func_tcs_shader.cso)
 			key->mono.tcs.inputs_to_copy = sctx->vs_shader.cso->outputs_written;
 		break;
 	case PIPE_SHADER_TESS_EVAL:
 		if (sctx->gs_shader.cso)
-- 
2.7.4