[Mesa-dev] [PATCH 3/3] i965: Add i965 plumbing for ARB_post_depth_coverage for i965 (gen9+).

[Jason Ekstrand]

On Thu, Nov 17, 2016 at 12:36 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote:

> On Thu, Nov 17, 2016 at 3:27 PM, Plamena Manolova
> <plamena.manolova at intel.com> wrote:
> > This extension allows the fragment shader to control whether values in
> > gl_SampleMaskIn[] reflect the coverage after application of the early
> > depth and stencil tests.
> >
> > Signed-off-by: Plamena Manolova <plamena.manolova at intel.com>
> > ---
> >  src/mesa/drivers/dri/i965/brw_compiler.h     |  1 +
> >  src/mesa/drivers/dri/i965/brw_fs.cpp         |  1 +
> >  src/mesa/drivers/dri/i965/gen8_ps_state.c    | 13 ++++++++++---
> >  src/mesa/drivers/dri/i965/intel_extensions.c |  1 +
> >  4 files changed, 13 insertions(+), 3 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h
> b/src/mesa/drivers/dri/i965/brw_compiler.h
> > index c2400f9..d97d466 100644
> > --- a/src/mesa/drivers/dri/i965/brw_compiler.h
> > +++ b/src/mesa/drivers/dri/i965/brw_compiler.h
> > @@ -397,6 +397,7 @@ struct brw_wm_prog_data {
> >     bool computed_stencil;
> >
> >     bool early_fragment_tests;
> > +   bool post_depth_coverage;
> >     bool dispatch_8;
> >     bool dispatch_16;
> >     bool dual_src_blend;
> > diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> > index 3cdf0bf..07ac4bc 100644
> > --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> > @@ -6455,6 +6455,7 @@ brw_compile_fs(const struct brw_compiler
> *compiler, void *log_data,
> >         shader->info->outputs_read);
> >
> >     prog_data->early_fragment_tests = shader->info->fs.early_
> fragment_tests;
> > +   prog_data->post_depth_coverage = shader->info->fs.post_depth_
> coverage;
> >
> >     prog_data->barycentric_interp_modes =
> >        brw_compute_barycentric_interp_modes(compiler->devinfo, shader);
> > diff --git a/src/mesa/drivers/dri/i965/gen8_ps_state.c
> b/src/mesa/drivers/dri/i965/gen8_ps_state.c
> > index a4eb962..33ef023 100644
> > --- a/src/mesa/drivers/dri/i965/gen8_ps_state.c
> > +++ b/src/mesa/drivers/dri/i965/gen8_ps_state.c
> > @@ -53,10 +53,17 @@ gen8_upload_ps_extra(struct brw_context *brw,
> >        dw1 |= GEN8_PSX_SHADER_IS_PER_SAMPLE;
> >
> >     if (prog_data->uses_sample_mask) {
> > -      if (brw->gen >= 9)
> > -         dw1 |= BRW_PSICMS_INNER << GEN9_PSX_SHADER_NORMAL_
> COVERAGE_MASK_SHIFT;
> > -      else
> > +      if (brw->gen >= 9) {
> > +         if (prog_data->post_depth_coverage) {
> > +            dw1 |= BRW_PCICMS_DEPTH << GEN9_PSX_SHADER_NORMAL_
> COVERAGE_MASK_SHIFT;
> > +         }
> > +         else {
> > +            dw1 |= BRW_PSICMS_INNER << GEN9_PSX_SHADER_NORMAL_
> COVERAGE_MASK_SHIFT;
> > +         }
> > +      }
> > +      else {
> >           dw1 |= GEN8_PSX_SHADER_USES_INPUT_COVERAGE_MASK;
> > +      }
> >     }
> >
> >     if (prog_data->uses_omask)
> > diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
> b/src/mesa/drivers/dri/i965/intel_extensions.c
> > index 66079b5..cc3d634 100644
> > --- a/src/mesa/drivers/dri/i965/intel_extensions.c
> > +++ b/src/mesa/drivers/dri/i965/intel_extensions.c
> > @@ -225,6 +225,7 @@ intelInitExtensions(struct gl_context *ctx)
> >     ctx->Extensions.ARB_vertex_shader = true;
> >     ctx->Extensions.ARB_vertex_type_2_10_10_10_rev = true;
> >     ctx->Extensions.ARB_vertex_type_10f_11f_11f_rev = true;
> > +   ctx->Extensions.ARB_post_depth_coverage = true;
>
> Shouldn't this be in a gen9-only section?
>

Yes, it should.


> >     ctx->Extensions.EXT_blend_color = true;
> >     ctx->Extensions.EXT_blend_equation_separate = true;
> >     ctx->Extensions.EXT_blend_func_separate = true;
> > --
> > 2.7.4
> >
> > _______________________________________________
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> > mesa-dev at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
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