[Mesa-dev] [PATCH 5/7] freedreno: make gmem tile size alignment configurable

[Rob Clark]

a5xx seems to prefer 64 pixel alignment, in at least some cases.  Make
this configurable per generation.

Signed-off-by: Rob Clark <robdclark at gmail.com>
---
 src/gallium/drivers/freedreno/freedreno_gmem.c   | 18 ++++++++++--------
 src/gallium/drivers/freedreno/freedreno_screen.c |  6 ++++++
 src/gallium/drivers/freedreno/freedreno_screen.h |  1 +
 3 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/freedreno/freedreno_gmem.c b/src/gallium/drivers/freedreno/freedreno_gmem.c
index ed625e4..b94e33d 100644
--- a/src/gallium/drivers/freedreno/freedreno_gmem.c
+++ b/src/gallium/drivers/freedreno/freedreno_gmem.c
@@ -109,7 +109,8 @@ calculate_tiles(struct fd_batch *batch)
 	struct fd_gmem_stateobj *gmem = &ctx->gmem;
 	struct pipe_scissor_state *scissor = &batch->max_scissor;
 	struct pipe_framebuffer_state *pfb = &batch->framebuffer;
-	uint32_t gmem_size = ctx->screen->gmemsize_bytes;
+	const uint32_t gmem_alignment = ctx->screen->gmem_alignment;
+	const uint32_t gmem_size = ctx->screen->gmemsize_bytes;
 	uint32_t minx, miny, width, height;
 	uint32_t nbins_x = 1, nbins_y = 1;
 	uint32_t bin_w, bin_h;
@@ -146,21 +147,22 @@ calculate_tiles(struct fd_batch *batch)
 		width = pfb->width;
 		height = pfb->height;
 	} else {
-		minx = scissor->minx & ~31; /* round down to multiple of 32 */
-		miny = scissor->miny & ~31;
+		/* round down to multiple of alignment: */
+		minx = scissor->minx & ~(gmem_alignment - 1);
+		miny = scissor->miny & ~(gmem_alignment - 1);
 		width = scissor->maxx - minx;
 		height = scissor->maxy - miny;
 	}
 
-	bin_w = align(width, 32);
-	bin_h = align(height, 32);
+	bin_w = align(width, gmem_alignment);
+	bin_h = align(height, gmem_alignment);
 
 	/* first, find a bin width that satisfies the maximum width
 	 * restrictions:
 	 */
 	while (bin_w > max_width) {
 		nbins_x++;
-		bin_w = align(width / nbins_x, 32);
+		bin_w = align(width / nbins_x, gmem_alignment);
 	}
 
 	if (fd_mesa_debug & FD_DBG_MSGS) {
@@ -177,10 +179,10 @@ calculate_tiles(struct fd_batch *batch)
 	while (total_size(cbuf_cpp, zsbuf_cpp, bin_w, bin_h, gmem) > gmem_size) {
 		if (bin_w > bin_h) {
 			nbins_x++;
-			bin_w = align(width / nbins_x, 32);
+			bin_w = align(width / nbins_x, gmem_alignment);
 		} else {
 			nbins_y++;
-			bin_h = align(height / nbins_y, 32);
+			bin_h = align(height / nbins_y, gmem_alignment);
 		}
 	}
 
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index 4fe9a36..9e316c8 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -671,6 +671,12 @@ fd_screen_create(struct fd_device *dev)
 		goto fail;
 	}
 
+	if (screen->gpu_id >= 500) {
+		screen->gmem_alignment = 64;
+	} else {
+		screen->gmem_alignment = 32;
+	}
+
 	/* NOTE: don't enable reordering on a2xx, since completely untested.
 	 * Also, don't enable if we have too old of a kernel to support
 	 * growable cmdstream buffers, since memory requirement for cmdstream
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.h b/src/gallium/drivers/freedreno/freedreno_screen.h
index db9050e..3fc66fb 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.h
+++ b/src/gallium/drivers/freedreno/freedreno_screen.h
@@ -64,6 +64,7 @@ struct fd_screen {
 	uint32_t chip_id;        /* coreid:8 majorrev:8 minorrev:8 patch:8 */
 	uint32_t max_freq;
 	uint32_t max_rts;        /* max # of render targets */
+	uint32_t gmem_alignment;
 	bool has_timestamp;
 
 	void *compiler;          /* currently unused for a2xx */
-- 
2.7.4