[Mesa-dev] [PATCH 53/56] i965: add shader cache support for tess stages

[Timothy Arceri]

---
 src/mesa/drivers/dri/i965/brw_shader_cache.c | 48 ++++++++++++++++++++++++++++
 src/mesa/drivers/dri/i965/brw_tcs.c          | 16 ++++++++--
 src/mesa/drivers/dri/i965/brw_tes.c          | 15 +++++++--
 3 files changed, 73 insertions(+), 6 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_shader_cache.c b/src/mesa/drivers/dri/i965/brw_shader_cache.c
index f03809e..79f4717 100644
--- a/src/mesa/drivers/dri/i965/brw_shader_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_shader_cache.c
@@ -306,6 +306,8 @@ read_and_upload(struct brw_context *brw, struct disk_cache *cache,
    unsigned char binary_sha1[20];
 
    struct brw_wm_prog_key wm_key;
+   struct brw_tcs_prog_key tcs_key;
+   struct brw_tes_prog_key tes_key;
    struct brw_gs_prog_key gs_key;
    struct brw_vs_prog_key vs_key;
 
@@ -319,6 +321,16 @@ read_and_upload(struct brw_context *brw, struct disk_cache *cache,
    case MESA_SHADER_VERTEX:
       gen_shader_sha1(brw, prog, stage, &vs_key, binary_sha1);
       break;
+   case MESA_SHADER_TESS_CTRL:
+      brw_tcs_populate_key(brw, &tcs_key);
+      tcs_key.program_string_id = 0;
+      gen_shader_sha1(brw, prog, stage, &tcs_key, binary_sha1);
+      break;
+   case MESA_SHADER_TESS_EVAL:
+      brw_tes_populate_key(brw, &tes_key);
+      tes_key.program_string_id = 0;
+      gen_shader_sha1(brw, prog, stage, &tes_key, binary_sha1);
+      break;
    case MESA_SHADER_GEOMETRY:
       brw_gs_populate_key(brw, &gs_key);
       gs_key.program_string_id = 0;
@@ -389,6 +401,16 @@ read_and_upload(struct brw_context *brw, struct disk_cache *cache,
       SET_UPLOAD_PRAMS(vs, VS, vp)
       break;
    }
+   case MESA_SHADER_TESS_CTRL: {
+      struct brw_program *tcp = (struct brw_program *) prog;
+      SET_UPLOAD_PRAMS(tcs, TCS, tcp)
+      break;
+   }
+   case MESA_SHADER_TESS_EVAL: {
+      struct brw_program *tep = (struct brw_program *) prog;
+      SET_UPLOAD_PRAMS(tes, TES, tep)
+      break;
+   }
    case MESA_SHADER_GEOMETRY: {
       struct brw_program *gp = (struct brw_program *) prog;
       SET_UPLOAD_PRAMS(gs, GS, gp)
@@ -598,6 +620,32 @@ write_cached_program(struct brw_context *brw)
                          MESA_SHADER_VERTEX);
    }
 
+   prog = brw->ctx._Shader->CurrentProgram[MESA_SHADER_TESS_CTRL];
+   if (prog && !prog->program_written_to_cache) {
+      struct brw_tcs_prog_key tcs_key;
+      brw_tcs_populate_key(brw, &tcs_key);
+      tcs_key.program_string_id = 0;
+
+      write_program_data(brw, prog, &tcs_key, brw->tcs.base.prog_data,
+                         brw->tcs.base.prog_data->program_size,
+                         sizeof(struct brw_tcs_prog_data),
+                         brw->tcs.base.prog_offset, cache,
+                         MESA_SHADER_TESS_CTRL);
+   }
+
+   prog = brw->ctx._Shader->CurrentProgram[MESA_SHADER_TESS_EVAL];
+   if (prog && !prog->program_written_to_cache) {
+      struct brw_tes_prog_key tes_key;
+      brw_tes_populate_key(brw, &tes_key);
+      tes_key.program_string_id = 0;
+
+      write_program_data(brw, prog, &tes_key, brw->tes.base.prog_data,
+                         brw->tes.base.prog_data->program_size,
+                         sizeof(struct brw_tes_prog_data),
+                         brw->tes.base.prog_offset, cache,
+                         MESA_SHADER_TESS_EVAL);
+   }
+
    prog = brw->ctx._Shader->CurrentProgram[MESA_SHADER_GEOMETRY];
    if (prog && !prog->program_written_to_cache) {
       struct brw_gs_prog_key gs_key;
diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c
index 83b57cb..4232f2a 100644
--- a/src/mesa/drivers/dri/i965/brw_tcs.c
+++ b/src/mesa/drivers/dri/i965/brw_tcs.c
@@ -368,9 +368,19 @@ brw_upload_tcs_prog(struct brw_context *brw)
                          &key, sizeof(key),
                          &stage_state->prog_offset,
                          &brw->tcs.base.prog_data)) {
-      bool success = brw_codegen_tcs_prog(brw, tcp, tep, &key);
-      assert(success);
-      (void)success;
+#ifdef ENABLE_SHADER_CACHE
+      /* If upload from disk cache failed call codegen */
+      if (!upload_cached_program(brw, MESA_SHADER_TESS_CTRL)) {
+         tcp = (struct brw_program *) brw->tess_ctrl_program;
+         if (tcp)
+            tcp->id = key.program_string_id;
+#endif
+         bool success = brw_codegen_tcs_prog(brw, tcp, tep, &key);
+         assert(success);
+         (void)success;
+#ifdef ENABLE_SHADER_CACHE
+      }
+#endif
    }
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c
index 94e873b..fcab31d 100644
--- a/src/mesa/drivers/dri/i965/brw_tes.c
+++ b/src/mesa/drivers/dri/i965/brw_tes.c
@@ -273,9 +273,18 @@ brw_upload_tes_prog(struct brw_context *brw)
                          &key, sizeof(key),
                          &stage_state->prog_offset,
                          &brw->tes.base.prog_data)) {
-      bool success = brw_codegen_tes_prog(brw, tep, &key);
-      assert(success);
-      (void)success;
+#ifdef ENABLE_SHADER_CACHE
+      /* If upload from disk cache failed call codegen */
+      if (!upload_cached_program(brw, MESA_SHADER_TESS_EVAL)) {
+         tep = (struct brw_program *) brw->tess_eval_program;
+         tep->id = key.program_string_id;
+#endif
+         bool success = brw_codegen_tes_prog(brw, tep, &key);
+         assert(success);
+         (void)success;
+#ifdef ENABLE_SHADER_CACHE
+      }
+#endif
    }
 }
 
-- 
2.7.4