[Mesa-dev] [PATCH] i965/fs: Refactor handling of constant tg4 offsets
kenneth at whitecape.org
Tue Nov 29 05:14:06 UTC 2016
On Monday, November 28, 2016 7:28:12 PM PST Jason Ekstrand wrote:
> Previously, we had an OFFSET_VALUE source for logical texture instructions
> that was intended to mean exactly what it says, "offset". In reality, we
> only fully used it for tg4 offsets. We used offset_value.file == IMM to
> mean, "you have a constant offset, go look in instr->offset" and didn't
> actually use the contents of the register at all in that case except for
> in nir_emit_texture where we used it as a temporary before we copy it into
> This commit renames OFFSET_VALUE to TG4_OFFSET and restricts its usage to
> indirect tg4 offsets only. The nir_emit_texture code is refactored so that
> we explicitly build a header_bits value which is placed in instr->offset
> and the constant offset values (both for tg4 and regular texture
> operations) are used to construct header_bits and don't go through the
> offset source at all. Finally, we stop passing offset_value in to
> lower_sampler_logical_send_gen5 because we can't do indirect offsets until
> gen7 anyway.
> src/mesa/drivers/dri/i965/brw_defines.h | 2 +-
> src/mesa/drivers/dri/i965/brw_fs.cpp | 19 +++++++--------
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 42 +++++++++++++++-----------------
> 3 files changed, 29 insertions(+), 34 deletions(-)
Thanks for separating these two entangled concepts. It's much less
I think this is a good first step. It doesn't conflict with our longer
term plans to replace inst->offset with immediate sources. Even if we
do that, keeping the "must be constant" [-8, 7] ordinary offsets
separate from the [-32, 31] gather4_po offsets is a good idea.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
-------------- next part --------------
A non-text attachment was scrubbed...
Size: 833 bytes
Desc: This is a digitally signed message part.
More information about the mesa-dev