[Mesa-dev] [PATCH 5/6] swr: reorder renderable formats, add grouping comments
Rowley, Timothy O
timothy.o.rowley at intel.com
Tue Nov 29 23:19:19 UTC 2016
I’ve verified the same entries are in the list before/after.
Reviewed-by: Tim Rowley <timothy.o.rowley at intel.com<mailto:timothy.o.rowley at intel.com>>
On Nov 22, 2016, at 7:37 PM, Ilia Mirkin <imirkin at alum.mit.edu<mailto:imirkin at alum.mit.edu>> wrote:
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu<mailto:imirkin at alum.mit.edu>>
---
src/gallium/drivers/swr/swr_screen.cpp | 152 +++++++++++++++++++--------------
1 file changed, 87 insertions(+), 65 deletions(-)
diff --git a/src/gallium/drivers/swr/swr_screen.cpp b/src/gallium/drivers/swr/swr_screen.cpp
index b17faee..642f9be 100644
--- a/src/gallium/drivers/swr/swr_screen.cpp
+++ b/src/gallium/drivers/swr/swr_screen.cpp
@@ -377,89 +377,141 @@ SWR_FORMAT
mesa_to_swr_format(enum pipe_format format)
{
static const std::map<pipe_format,SWR_FORMAT> mesa2swr = {
- {PIPE_FORMAT_B8G8R8A8_UNORM, B8G8R8A8_UNORM},
- {PIPE_FORMAT_B8G8R8X8_UNORM, B8G8R8X8_UNORM},
- {PIPE_FORMAT_B5G5R5A1_UNORM, B5G5R5A1_UNORM},
- {PIPE_FORMAT_B4G4R4A4_UNORM, B4G4R4A4_UNORM},
- {PIPE_FORMAT_B5G6R5_UNORM, B5G6R5_UNORM},
- {PIPE_FORMAT_R10G10B10A2_UNORM, R10G10B10A2_UNORM},
- {PIPE_FORMAT_A8_UNORM, A8_UNORM},
+ /* depth / stencil */
{PIPE_FORMAT_Z16_UNORM, R16_UNORM}, // z
{PIPE_FORMAT_Z32_FLOAT, R32_FLOAT}, // z
{PIPE_FORMAT_Z24_UNORM_S8_UINT, R24_UNORM_X8_TYPELESS}, // z
{PIPE_FORMAT_Z24X8_UNORM, R24_UNORM_X8_TYPELESS}, // z
+ {PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, R32_FLOAT_X8X24_TYPELESS}, // z
+
+ /* alpha */
+ {PIPE_FORMAT_A8_UNORM, A8_UNORM},
+ {PIPE_FORMAT_A16_UNORM, A16_UNORM},
+ {PIPE_FORMAT_A16_FLOAT, A16_FLOAT},
+ {PIPE_FORMAT_A32_FLOAT, A32_FLOAT},
+
+ /* odd sizes, bgr */
+ {PIPE_FORMAT_B5G6R5_UNORM, B5G6R5_UNORM},
+ {PIPE_FORMAT_B5G6R5_SRGB, B5G6R5_UNORM_SRGB},
+ {PIPE_FORMAT_B5G5R5A1_UNORM, B5G5R5A1_UNORM},
+ {PIPE_FORMAT_B5G5R5X1_UNORM, B5G5R5X1_UNORM},
+ {PIPE_FORMAT_B4G4R4A4_UNORM, B4G4R4A4_UNORM},
+ {PIPE_FORMAT_B8G8R8A8_UNORM, B8G8R8A8_UNORM},
+ {PIPE_FORMAT_B8G8R8A8_SRGB, B8G8R8A8_UNORM_SRGB},
+ {PIPE_FORMAT_B8G8R8X8_UNORM, B8G8R8X8_UNORM},
+ {PIPE_FORMAT_B8G8R8X8_SRGB, B8G8R8X8_UNORM_SRGB},
+
+ /* rgb10a2 */
+ {PIPE_FORMAT_R10G10B10A2_UNORM, R10G10B10A2_UNORM},
+ {PIPE_FORMAT_R10G10B10A2_SNORM, R10G10B10A2_SNORM},
+ {PIPE_FORMAT_R10G10B10A2_USCALED, R10G10B10A2_USCALED},
+ {PIPE_FORMAT_R10G10B10A2_SSCALED, R10G10B10A2_SSCALED},
+ {PIPE_FORMAT_R10G10B10A2_UINT, R10G10B10A2_UINT},
+
+ /* rgb10x2 */
+ {PIPE_FORMAT_R10G10B10X2_USCALED, R10G10B10X2_USCALED},
+
+ /* bgr10a2 */
+ {PIPE_FORMAT_B10G10R10A2_UNORM, B10G10R10A2_UNORM},
+ {PIPE_FORMAT_B10G10R10A2_SNORM, B10G10R10A2_SNORM},
+ {PIPE_FORMAT_B10G10R10A2_USCALED, B10G10R10A2_USCALED},
+ {PIPE_FORMAT_B10G10R10A2_SSCALED, B10G10R10A2_SSCALED},
+ {PIPE_FORMAT_B10G10R10A2_UINT, B10G10R10A2_UINT},
+
+ /* bgr10x2 */
+ {PIPE_FORMAT_B10G10R10X2_UNORM, B10G10R10X2_UNORM},
+
+ /* r11g11b10 */
+ {PIPE_FORMAT_R11G11B10_FLOAT, R11G11B10_FLOAT},
+
+ /* 32 bits per component */
{PIPE_FORMAT_R32_FLOAT, R32_FLOAT},
{PIPE_FORMAT_R32G32_FLOAT, R32G32_FLOAT},
{PIPE_FORMAT_R32G32B32_FLOAT, R32G32B32_FLOAT},
{PIPE_FORMAT_R32G32B32A32_FLOAT, R32G32B32A32_FLOAT},
+ {PIPE_FORMAT_R32G32B32X32_FLOAT, R32G32B32X32_FLOAT},
+
{PIPE_FORMAT_R32_USCALED, R32_USCALED},
{PIPE_FORMAT_R32G32_USCALED, R32G32_USCALED},
{PIPE_FORMAT_R32G32B32_USCALED, R32G32B32_USCALED},
{PIPE_FORMAT_R32G32B32A32_USCALED, R32G32B32A32_USCALED},
+
{PIPE_FORMAT_R32_SSCALED, R32_SSCALED},
{PIPE_FORMAT_R32G32_SSCALED, R32G32_SSCALED},
{PIPE_FORMAT_R32G32B32_SSCALED, R32G32B32_SSCALED},
{PIPE_FORMAT_R32G32B32A32_SSCALED, R32G32B32A32_SSCALED},
+
+ {PIPE_FORMAT_R32_UINT, R32_UINT},
+ {PIPE_FORMAT_R32G32_UINT, R32G32_UINT},
+ {PIPE_FORMAT_R32G32B32_UINT, R32G32B32_UINT},
+ {PIPE_FORMAT_R32G32B32A32_UINT, R32G32B32A32_UINT},
+
+ {PIPE_FORMAT_R32_SINT, R32_SINT},
+ {PIPE_FORMAT_R32G32_SINT, R32G32_SINT},
+ {PIPE_FORMAT_R32G32B32_SINT, R32G32B32_SINT},
+ {PIPE_FORMAT_R32G32B32A32_SINT, R32G32B32A32_SINT},
+
+ /* 16 bits per component */
{PIPE_FORMAT_R16_UNORM, R16_UNORM},
{PIPE_FORMAT_R16G16_UNORM, R16G16_UNORM},
{PIPE_FORMAT_R16G16B16_UNORM, R16G16B16_UNORM},
{PIPE_FORMAT_R16G16B16A16_UNORM, R16G16B16A16_UNORM},
+ {PIPE_FORMAT_R16G16B16X16_UNORM, R16G16B16X16_UNORM},
+
{PIPE_FORMAT_R16_USCALED, R16_USCALED},
{PIPE_FORMAT_R16G16_USCALED, R16G16_USCALED},
{PIPE_FORMAT_R16G16B16_USCALED, R16G16B16_USCALED},
{PIPE_FORMAT_R16G16B16A16_USCALED, R16G16B16A16_USCALED},
+
{PIPE_FORMAT_R16_SNORM, R16_SNORM},
{PIPE_FORMAT_R16G16_SNORM, R16G16_SNORM},
{PIPE_FORMAT_R16G16B16_SNORM, R16G16B16_SNORM},
{PIPE_FORMAT_R16G16B16A16_SNORM, R16G16B16A16_SNORM},
+
{PIPE_FORMAT_R16_SSCALED, R16_SSCALED},
{PIPE_FORMAT_R16G16_SSCALED, R16G16_SSCALED},
{PIPE_FORMAT_R16G16B16_SSCALED, R16G16B16_SSCALED},
{PIPE_FORMAT_R16G16B16A16_SSCALED, R16G16B16A16_SSCALED},
+
+ {PIPE_FORMAT_R16_UINT, R16_UINT},
+ {PIPE_FORMAT_R16G16_UINT, R16G16_UINT},
+ {PIPE_FORMAT_R16G16B16_UINT, R16G16B16_UINT},
+ {PIPE_FORMAT_R16G16B16A16_UINT, R16G16B16A16_UINT},
+
+ {PIPE_FORMAT_R16_SINT, R16_SINT},
+ {PIPE_FORMAT_R16G16_SINT, R16G16_SINT},
+ {PIPE_FORMAT_R16G16B16_SINT, R16G16B16_SINT},
+ {PIPE_FORMAT_R16G16B16A16_SINT, R16G16B16A16_SINT},
+
+ {PIPE_FORMAT_R16_FLOAT, R16_FLOAT},
+ {PIPE_FORMAT_R16G16_FLOAT, R16G16_FLOAT},
+ {PIPE_FORMAT_R16G16B16_FLOAT, R16G16B16_FLOAT},
+ {PIPE_FORMAT_R16G16B16A16_FLOAT, R16G16B16A16_FLOAT},
+ {PIPE_FORMAT_R16G16B16X16_FLOAT, R16G16B16X16_FLOAT},
+
+ /* 8 bits per component */
{PIPE_FORMAT_R8_UNORM, R8_UNORM},
{PIPE_FORMAT_R8G8_UNORM, R8G8_UNORM},
{PIPE_FORMAT_R8G8B8_UNORM, R8G8B8_UNORM},
+ {PIPE_FORMAT_R8G8B8_SRGB, R8G8B8_UNORM_SRGB},
{PIPE_FORMAT_R8G8B8A8_UNORM, R8G8B8A8_UNORM},
+ {PIPE_FORMAT_R8G8B8A8_SRGB, R8G8B8A8_UNORM_SRGB},
+ {PIPE_FORMAT_R8G8B8X8_UNORM, R8G8B8X8_UNORM},
+
{PIPE_FORMAT_R8_USCALED, R8_USCALED},
{PIPE_FORMAT_R8G8_USCALED, R8G8_USCALED},
{PIPE_FORMAT_R8G8B8_USCALED, R8G8B8_USCALED},
{PIPE_FORMAT_R8G8B8A8_USCALED, R8G8B8A8_USCALED},
+
{PIPE_FORMAT_R8_SNORM, R8_SNORM},
{PIPE_FORMAT_R8G8_SNORM, R8G8_SNORM},
{PIPE_FORMAT_R8G8B8_SNORM, R8G8B8_SNORM},
{PIPE_FORMAT_R8G8B8A8_SNORM, R8G8B8A8_SNORM},
+
{PIPE_FORMAT_R8_SSCALED, R8_SSCALED},
{PIPE_FORMAT_R8G8_SSCALED, R8G8_SSCALED},
{PIPE_FORMAT_R8G8B8_SSCALED, R8G8B8_SSCALED},
{PIPE_FORMAT_R8G8B8A8_SSCALED, R8G8B8A8_SSCALED},
- {PIPE_FORMAT_R16_FLOAT, R16_FLOAT},
- {PIPE_FORMAT_R16G16_FLOAT, R16G16_FLOAT},
- {PIPE_FORMAT_R16G16B16_FLOAT, R16G16B16_FLOAT},
- {PIPE_FORMAT_R16G16B16A16_FLOAT, R16G16B16A16_FLOAT},
-
- {PIPE_FORMAT_R8G8B8_SRGB, R8G8B8_UNORM_SRGB},
- {PIPE_FORMAT_B8G8R8A8_SRGB, B8G8R8A8_UNORM_SRGB},
- {PIPE_FORMAT_B8G8R8X8_SRGB, B8G8R8X8_UNORM_SRGB},
- {PIPE_FORMAT_R8G8B8A8_SRGB, R8G8B8A8_UNORM_SRGB},
-
- {PIPE_FORMAT_B5G5R5X1_UNORM, B5G5R5X1_UNORM},
- {PIPE_FORMAT_R10G10B10A2_USCALED, R10G10B10A2_USCALED},
- {PIPE_FORMAT_R11G11B10_FLOAT, R11G11B10_FLOAT},
- {PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, R32_FLOAT_X8X24_TYPELESS}, // z
- {PIPE_FORMAT_R10G10B10X2_USCALED, R10G10B10X2_USCALED},
- {PIPE_FORMAT_B10G10R10A2_UNORM, B10G10R10A2_UNORM},
- {PIPE_FORMAT_R8G8B8X8_UNORM, R8G8B8X8_UNORM},
-
- {PIPE_FORMAT_A16_UNORM, A16_UNORM},
- {PIPE_FORMAT_A16_FLOAT, A16_FLOAT},
- {PIPE_FORMAT_A32_FLOAT, A32_FLOAT},
-
- {PIPE_FORMAT_R10G10B10A2_SSCALED, R10G10B10A2_SSCALED},
- {PIPE_FORMAT_R10G10B10A2_SNORM, R10G10B10A2_SNORM},
-
- {PIPE_FORMAT_B10G10R10A2_USCALED, B10G10R10A2_USCALED},
- {PIPE_FORMAT_B10G10R10A2_SSCALED, B10G10R10A2_SSCALED},
- {PIPE_FORMAT_B10G10R10A2_SNORM, B10G10R10A2_SNORM},
{PIPE_FORMAT_R8_UINT, R8_UINT},
{PIPE_FORMAT_R8G8_UINT, R8G8_UINT},
@@ -471,36 +523,6 @@ mesa_to_swr_format(enum pipe_format format)
{PIPE_FORMAT_R8G8B8_SINT, R8G8B8_SINT},
{PIPE_FORMAT_R8G8B8A8_SINT, R8G8B8A8_SINT},
- {PIPE_FORMAT_R16_UINT, R16_UINT},
- {PIPE_FORMAT_R16G16_UINT, R16G16_UINT},
- {PIPE_FORMAT_R16G16B16_UINT, R16G16B16_UINT},
- {PIPE_FORMAT_R16G16B16A16_UINT, R16G16B16A16_UINT},
-
- {PIPE_FORMAT_R16_SINT, R16_SINT},
- {PIPE_FORMAT_R16G16_SINT, R16G16_SINT},
- {PIPE_FORMAT_R16G16B16_SINT, R16G16B16_SINT},
- {PIPE_FORMAT_R16G16B16A16_SINT, R16G16B16A16_SINT},
-
- {PIPE_FORMAT_R32_UINT, R32_UINT},
- {PIPE_FORMAT_R32G32_UINT, R32G32_UINT},
- {PIPE_FORMAT_R32G32B32_UINT, R32G32B32_UINT},
- {PIPE_FORMAT_R32G32B32A32_UINT, R32G32B32A32_UINT},
-
- {PIPE_FORMAT_R32_SINT, R32_SINT},
- {PIPE_FORMAT_R32G32_SINT, R32G32_SINT},
- {PIPE_FORMAT_R32G32B32_SINT, R32G32B32_SINT},
- {PIPE_FORMAT_R32G32B32A32_SINT, R32G32B32A32_SINT},
-
- {PIPE_FORMAT_B10G10R10A2_UINT, B10G10R10A2_UINT},
-
- {PIPE_FORMAT_B10G10R10X2_UNORM, B10G10R10X2_UNORM},
- {PIPE_FORMAT_R16G16B16X16_UNORM, R16G16B16X16_UNORM},
- {PIPE_FORMAT_R16G16B16X16_FLOAT, R16G16B16X16_FLOAT},
- {PIPE_FORMAT_R32G32B32X32_FLOAT, R32G32B32X32_FLOAT},
- {PIPE_FORMAT_R10G10B10A2_UINT, R10G10B10A2_UINT},
-
- {PIPE_FORMAT_B5G6R5_SRGB, B5G6R5_UNORM_SRGB},
-
/* These formats have entries in SWR but don't have Load/StoreTile
* implementations. That means these aren't renderable, and thus having
* a mapping entry here is detrimental.
--
2.7.3
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