[Mesa-dev] [PATCH 6/8] radeonsi: add a tess+GS hang workaround for VI dGPUs

Marek Olšák maraeo at gmail.com
Wed Nov 30 01:36:37 UTC 2016


From: Marek Olšák <marek.olsak at amd.com>

ported from Vulkan

Cc: 13.0 <mesa-stable at lists.freedesktop.org>
---
 src/gallium/drivers/radeonsi/si_state_draw.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index cba5a03..cae19dc 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -289,24 +289,32 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
 
 		/* Bug with tessellation and GS on Bonaire and older 2 SE chips. */
 		if ((sctx->b.family == CHIP_TAHITI ||
 		     sctx->b.family == CHIP_PITCAIRN ||
 		     sctx->b.family == CHIP_BONAIRE) &&
 		    sctx->gs_shader.cso)
 			partial_vs_wave = true;
 
 		/* Needed for 028B6C_DISTRIBUTION_MODE != 0 */
 		if (sctx->screen->has_distributed_tess) {
-			if (sctx->gs_shader.cso)
+			if (sctx->gs_shader.cso) {
 				partial_es_wave = true;
-			else
+
+				/* GPU hang workaround. */
+				if (sctx->b.family == CHIP_TONGA ||
+				    sctx->b.family == CHIP_FIJI ||
+				    sctx->b.family == CHIP_POLARIS10 ||
+				    sctx->b.family == CHIP_POLARIS11)
+					partial_vs_wave = true;
+			} else {
 				partial_vs_wave = true;
+			}
 		}
 	}
 
 	/* This is a hardware requirement. */
 	if ((rs && rs->line_stipple_enable) ||
 	    (sctx->b.screen->debug_flags & DBG_SWITCH_ON_EOP)) {
 		ia_switch_on_eop = true;
 		wd_switch_on_eop = true;
 	}
 
-- 
2.7.4



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