[Mesa-dev] [PATCH 8/8] radeonsi: document a CP DMA bug that doesn't need a workaround yet
Nicolai Hähnle
nhaehnle at gmail.com
Wed Nov 30 14:03:55 UTC 2016
Apart from the comment on patch 7, the series is
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
On 30.11.2016 02:36, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> This one is easy to miss, because it's not documented in any internal doc.
> ---
> src/amd/common/sid.h | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h
> index 7f598ca..3b3983f 100644
> --- a/src/amd/common/sid.h
> +++ b/src/amd/common/sid.h
> @@ -144,21 +144,25 @@
> #define COPY_DATA_IMM 5
> #define COPY_DATA_DST_SEL(x) (((unsigned)(x) & 0xf) << 8)
> #define COPY_DATA_COUNT_SEL (1 << 16)
> #define COPY_DATA_WR_CONFIRM (1 << 20)
> #define PKT3_PFP_SYNC_ME 0x42
> #define PKT3_SURFACE_SYNC 0x43 /* deprecated on CIK, use ACQUIRE_MEM */
> #define PKT3_ME_INITIALIZE 0x44 /* not on CIK */
> #define PKT3_COND_WRITE 0x45
> #define PKT3_EVENT_WRITE 0x46
> #define PKT3_EVENT_WRITE_EOP 0x47
> -#define PKT3_EVENT_WRITE_EOS 0x48
> +/* CP DMA bug: Any use of CP_DMA.DST_SEL=TC must be avoided when EOS packets
> + * are used. Use DST_SEL=MC instead. For prefetch, use SRC_SEL=TC and
> + * DST_SEL=MC. Only CIK chips are affected.
> + */
> +/*#define PKT3_EVENT_WRITE_EOS 0x48*/ /* fix CP DMA before uncommenting */
> #define PKT3_ONE_REG_WRITE 0x57 /* not on CIK */
> #define PKT3_ACQUIRE_MEM 0x58 /* new for CIK */
> #define PKT3_SET_CONFIG_REG 0x68
> #define PKT3_SET_CONTEXT_REG 0x69
> #define PKT3_SET_SH_REG 0x76
> #define PKT3_SET_SH_REG_OFFSET 0x77
> #define PKT3_SET_UCONFIG_REG 0x79 /* new for CIK */
> #define PKT3_LOAD_CONST_RAM 0x80
> #define PKT3_WRITE_CONST_RAM 0x81
> #define PKT3_DUMP_CONST_RAM 0x83
>
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