[Mesa-dev] [PATCH 02/19] radeonsi: parse SURFACE_SYNC correctly on CIK-VI

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_debug.c | 25 ++++++++++++++++---------
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_debug.c b/src/gallium/drivers/radeonsi/si_debug.c
index 75ab0e7..d172867 100644
--- a/src/gallium/drivers/radeonsi/si_debug.c
+++ b/src/gallium/drivers/radeonsi/si_debug.c
@@ -241,21 +241,21 @@ static void si_parse_set_reg_packet(FILE *f, uint32_t *ib, unsigned count,
 				    unsigned reg_offset)
 {
 	unsigned reg = (ib[1] << 2) + reg_offset;
 	int i;
 
 	for (i = 0; i < count; i++)
 		si_dump_reg(f, reg + i*4, ib[2+i], ~0);
 }
 
 static uint32_t *si_parse_packet3(FILE *f, uint32_t *ib, int *num_dw,
-				  int trace_id)
+				  int trace_id, enum chip_class chip_class)
 {
 	unsigned count = PKT_COUNT_G(ib[0]);
 	unsigned op = PKT3_IT_OPCODE_G(ib[0]);
 	const char *predicate = PKT3_PREDICATE(ib[0]) ? "(predicate)" : "";
 	int i;
 
 	/* Print the name first. */
 	for (i = 0; i < ARRAY_SIZE(packet3_table); i++)
 		if (packet3_table[i].op == op)
 			break;
@@ -292,23 +292,29 @@ static uint32_t *si_parse_packet3(FILE *f, uint32_t *ib, int *num_dw,
 		break;
 	case PKT3_ACQUIRE_MEM:
 		si_dump_reg(f, R_0301F0_CP_COHER_CNTL, ib[1], ~0);
 		si_dump_reg(f, R_0301F4_CP_COHER_SIZE, ib[2], ~0);
 		si_dump_reg(f, R_030230_CP_COHER_SIZE_HI, ib[3], ~0);
 		si_dump_reg(f, R_0301F8_CP_COHER_BASE, ib[4], ~0);
 		si_dump_reg(f, R_0301E4_CP_COHER_BASE_HI, ib[5], ~0);
 		print_named_value(f, "POLL_INTERVAL", ib[6], 16);
 		break;
 	case PKT3_SURFACE_SYNC:
-		si_dump_reg(f, R_0085F0_CP_COHER_CNTL, ib[1], ~0);
-		si_dump_reg(f, R_0085F4_CP_COHER_SIZE, ib[2], ~0);
-		si_dump_reg(f, R_0085F8_CP_COHER_BASE, ib[3], ~0);
+		if (chip_class >= CIK) {
+			si_dump_reg(f, R_0301F0_CP_COHER_CNTL, ib[1], ~0);
+			si_dump_reg(f, R_0301F4_CP_COHER_SIZE, ib[2], ~0);
+			si_dump_reg(f, R_0301F8_CP_COHER_BASE, ib[3], ~0);
+		} else {
+			si_dump_reg(f, R_0085F0_CP_COHER_CNTL, ib[1], ~0);
+			si_dump_reg(f, R_0085F4_CP_COHER_SIZE, ib[2], ~0);
+			si_dump_reg(f, R_0085F8_CP_COHER_BASE, ib[3], ~0);
+		}
 		print_named_value(f, "POLL_INTERVAL", ib[4], 16);
 		break;
 	case PKT3_EVENT_WRITE:
 		si_dump_reg(f, R_028A90_VGT_EVENT_INITIATOR, ib[1],
 			    S_028A90_EVENT_TYPE(~0));
 		print_named_value(f, "EVENT_INDEX", (ib[1] >> 8) & 0xf, 4);
 		print_named_value(f, "INV_L2", (ib[1] >> 20) & 0x1, 1);
 		if (count > 0) {
 			print_named_value(f, "ADDRESS_LO", ib[2], 32);
 			print_named_value(f, "ADDRESS_HI", ib[3], 16);
@@ -414,30 +420,31 @@ static uint32_t *si_parse_packet3(FILE *f, uint32_t *ib, int *num_dw,
  * Parse and print an IB into a file.
  *
  * \param f		file
  * \param ib		IB
  * \param num_dw	size of the IB
  * \param chip_class	chip class
  * \param trace_id	the last trace ID that is known to have been reached
  *			and executed by the CP, typically read from a buffer
  */
 static void si_parse_ib(FILE *f, uint32_t *ib, int num_dw, int trace_id,
-			const char *name)
+			const char *name, enum chip_class chip_class)
 {
 	fprintf(f, "------------------ %s begin ------------------\n", name);
 
 	while (num_dw > 0) {
 		unsigned type = PKT_TYPE_G(ib[0]);
 
 		switch (type) {
 		case 3:
-			ib = si_parse_packet3(f, ib, &num_dw, trace_id);
+			ib = si_parse_packet3(f, ib, &num_dw, trace_id,
+					      chip_class);
 			break;
 		case 2:
 			/* type-2 nop */
 			if (ib[0] == 0x80000000) {
 				fprintf(f, COLOR_GREEN "NOP (type 2)" COLOR_RESET "\n");
 				ib++;
 				break;
 			}
 			/* fall through */
 		default:
@@ -518,29 +525,29 @@ static void si_dump_last_ib(struct si_context *sctx, FILE *f)
 		uint32_t *map = sctx->b.ws->buffer_map(sctx->last_trace_buf->buf,
 						       NULL,
 						       PIPE_TRANSFER_UNSYNCHRONIZED |
 						       PIPE_TRANSFER_READ);
 		if (map)
 			last_trace_id = *map;
 	}
 
 	if (sctx->init_config)
 		si_parse_ib(f, sctx->init_config->pm4, sctx->init_config->ndw,
-			    -1, "IB2: Init config");
+			    -1, "IB2: Init config", sctx->b.chip_class);
 
 	if (sctx->init_config_gs_rings)
 		si_parse_ib(f, sctx->init_config_gs_rings->pm4,
 			    sctx->init_config_gs_rings->ndw,
-			    -1, "IB2: Init GS rings");
+			    -1, "IB2: Init GS rings", sctx->b.chip_class);
 
 	si_parse_ib(f, sctx->last_gfx.ib, sctx->last_gfx.num_dw,
-		    last_trace_id, "IB");
+		    last_trace_id, "IB", sctx->b.chip_class);
 }
 
 static const char *priority_to_string(enum radeon_bo_priority priority)
 {
 #define ITEM(x) [RADEON_PRIO_##x] = #x
 	static const char *table[64] = {
 		ITEM(FENCE),
 	        ITEM(TRACE),
 	        ITEM(SO_FILLED_SIZE),
 	        ITEM(QUERY),
-- 
2.7.4