[Mesa-dev] [PATCH 10/19] gallium/radeon: move r600_common_context::texture_buffers to r600g

Marek Olšák maraeo at gmail.com
Sun Oct 2 21:09:25 UTC 2016


From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/r600/evergreen_state.c    | 2 +-
 src/gallium/drivers/r600/r600_pipe.c          | 1 +
 src/gallium/drivers/r600/r600_pipe.h          | 5 +++++
 src/gallium/drivers/r600/r600_state_common.c  | 2 +-
 src/gallium/drivers/radeon/r600_pipe_common.c | 2 --
 src/gallium/drivers/radeon/r600_pipe_common.h | 5 -----
 6 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index d137514..58d98a9 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -641,21 +641,21 @@ texture_buffer_sampler_view(struct r600_context *rctx,
 	/*
 	 * in theory dword 4 is for number of elements, for use with resinfo,
 	 * but it seems to utterly fail to work, the amd gpu shader analyser
 	 * uses a const buffer to store the element sizes for buffer txq
 	 */
 	view->tex_resource_words[4] = 0;
 	view->tex_resource_words[5] = view->tex_resource_words[6] = 0;
 	view->tex_resource_words[7] = S_03001C_TYPE(V_03001C_SQ_TEX_VTX_VALID_BUFFER);
 
 	if (tmp->resource.gpu_address)
-		LIST_ADDTAIL(&view->list, &rctx->b.texture_buffers);
+		LIST_ADDTAIL(&view->list, &rctx->texture_buffers);
 	return &view->base;
 }
 
 struct pipe_sampler_view *
 evergreen_create_sampler_view_custom(struct pipe_context *ctx,
 				     struct pipe_resource *texture,
 				     const struct pipe_sampler_view *state,
 				     unsigned width0, unsigned height0,
 				     unsigned force_level)
 {
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 635b76f..a350080 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -126,20 +126,21 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
 
 	rctx->b.b.screen = screen;
 	rctx->b.b.priv = priv;
 	rctx->b.b.destroy = r600_destroy_context;
 	rctx->b.set_atom_dirty = (void *)r600_set_atom_dirty;
 
 	if (!r600_common_context_init(&rctx->b, &rscreen->b, flags))
 		goto fail;
 
 	rctx->screen = rscreen;
+	LIST_INITHEAD(&rctx->texture_buffers);
 
 	r600_init_blit_functions(rctx);
 
 	if (rscreen->b.info.has_uvd) {
 		rctx->b.b.create_video_codec = r600_uvd_create_decoder;
 		rctx->b.b.create_video_buffer = r600_video_buffer_create;
 	} else {
 		rctx->b.b.create_video_codec = vl_create_decoder;
 		rctx->b.b.create_video_buffer = vl_video_buffer_create;
 	}
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 4403aca..cf8eba3 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -494,20 +494,25 @@ struct r600_context {
 
 	struct r600_pipe_shader_selector *fixed_func_tcs_shader;
 
 	struct r600_rasterizer_state	*rasterizer;
 	bool				alpha_to_one;
 	bool				force_blend_disable;
 	boolean				dual_src_blend;
 	unsigned			zwritemask;
 	int					ps_iter_samples;
 
+	/* The list of all texture buffer objects in this context.
+	 * This list is walked when a buffer is invalidated/reallocated and
+	 * the GPU addresses are updated. */
+	struct list_head		texture_buffers;
+
 	/* Index buffer. */
 	struct pipe_index_buffer	index_buffer;
 
 	/* Last draw state (-1 = unset). */
 	int				last_primitive_type; /* Last primitive type used in draw_vbo. */
 	int				last_start_instance;
 
 	void				*sb_context;
 	struct r600_isa		*isa;
 	float sample_positions[4 * 16];
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index bb99429..48c5443 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -2822,21 +2822,21 @@ static void r600_invalidate_buffer(struct pipe_context *ctx, struct pipe_resourc
 				found = true;
 				state->dirty_mask |= 1 << i;
 			}
 		}
 		if (found) {
 			r600_constant_buffers_dirty(rctx, state);
 		}
 	}
 
 	/* Texture buffer objects - update the virtual addresses in descriptors. */
-	LIST_FOR_EACH_ENTRY(view, &rctx->b.texture_buffers, list) {
+	LIST_FOR_EACH_ENTRY(view, &rctx->texture_buffers, list) {
 		if (view->base.texture == &rbuffer->b.b) {
 			uint64_t offset = view->base.u.buf.offset;
 			uint64_t va = rbuffer->gpu_address + offset;
 
 			view->tex_resource_words[0] = va;
 			view->tex_resource_words[2] &= C_038008_BASE_ADDRESS_HI;
 			view->tex_resource_words[2] |= S_038008_BASE_ADDRESS_HI(va >> 32);
 		}
 	}
 	/* Texture buffer objects - make bindings dirty if needed. */
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index 0f156df..ae495b4 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -521,22 +521,20 @@ bool r600_common_context_init(struct r600_common_context *rctx,
 	else
 		rctx->b.buffer_subdata = r600_buffer_subdata;
 
 	if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 43) {
 		rctx->b.get_device_reset_status = r600_get_reset_status;
 		rctx->gpu_reset_counter =
 			rctx->ws->query_value(rctx->ws,
 					      RADEON_GPU_RESET_COUNTER);
 	}
 
-	LIST_INITHEAD(&rctx->texture_buffers);
-
 	r600_init_context_texture_functions(rctx);
 	r600_init_viewport_functions(rctx);
 	r600_streamout_init(rctx);
 	r600_query_init(rctx);
 	cayman_init_msaa(&rctx->b);
 
 	rctx->allocator_zeroed_memory =
 		u_suballocator_create(&rctx->b, rscreen->info.gart_page_size,
 				      0, PIPE_USAGE_DEFAULT, true);
 	if (!rctx->allocator_zeroed_memory)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index cea1f22..1614ed2 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -608,25 +608,20 @@ struct r600_common_context {
 	struct {
 		struct r600_texture		*tex;
 		/* Query queue: 0 = usually active, 1 = waiting, 2 = readback. */
 		struct pipe_query		*ps_stats[3];
 		/* If all slots are used and another slot is needed,
 		 * the least recently used slot is evicted based on this. */
 		int64_t				last_use_timestamp;
 		bool				query_active;
 	} dcc_stats[5];
 
-	/* The list of all texture buffer objects in this context.
-	 * This list is walked when a buffer is invalidated/reallocated and
-	 * the GPU addresses are updated. */
-	struct list_head		texture_buffers;
-
 	struct pipe_debug_callback	debug;
 
 	void				*query_result_shader;
 
 	/* Copy one resource to another using async DMA. */
 	void (*dma_copy)(struct pipe_context *ctx,
 			 struct pipe_resource *dst,
 			 unsigned dst_level,
 			 unsigned dst_x, unsigned dst_y, unsigned dst_z,
 			 struct pipe_resource *src,
-- 
2.7.4



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