[Mesa-dev] [PATCH 65/77] i965: add shader cache support for tess stages
Timothy Arceri
timothy.arceri at collabora.com
Mon Oct 3 06:05:24 UTC 2016
---
src/mesa/drivers/dri/i965/brw_compiler.h | 4 ++
src/mesa/drivers/dri/i965/brw_shader_cache.c | 66 ++++++++++++++++++++++++++++
src/mesa/drivers/dri/i965/brw_tcs.c | 24 ++++++++--
src/mesa/drivers/dri/i965/brw_tes.c | 23 ++++++++--
4 files changed, 109 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h b/src/mesa/drivers/dri/i965/brw_compiler.h
index 41e9ebc..7cab880 100644
--- a/src/mesa/drivers/dri/i965/brw_compiler.h
+++ b/src/mesa/drivers/dri/i965/brw_compiler.h
@@ -656,6 +656,8 @@ struct brw_tcs_prog_data
/** Number vertices in output patch */
int instances;
+
+ unsigned program_size;
};
@@ -666,6 +668,8 @@ struct brw_tes_prog_data
enum brw_tess_partitioning partitioning;
enum brw_tess_output_topology output_topology;
enum brw_tess_domain domain;
+
+ unsigned program_size;
};
struct brw_gs_prog_data
diff --git a/src/mesa/drivers/dri/i965/brw_shader_cache.c b/src/mesa/drivers/dri/i965/brw_shader_cache.c
index 6b75303..c4ef567 100644
--- a/src/mesa/drivers/dri/i965/brw_shader_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_shader_cache.c
@@ -99,12 +99,20 @@ fallback_to_full_recompile(struct brw_context *brw,
struct gl_program *vp =
shProg->_LinkedShaders[MESA_SHADER_VERTEX]->Program;
+ struct gl_program *tcp = shProg->_LinkedShaders[MESA_SHADER_TESS_CTRL] ?
+ shProg->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program : NULL;
+ struct gl_program *tep = shProg->_LinkedShaders[MESA_SHADER_TESS_EVAL] ?
+ shProg->_LinkedShaders[MESA_SHADER_TESS_EVAL]->Program : NULL;
struct gl_program *gp = shProg->_LinkedShaders[MESA_SHADER_GEOMETRY] ?
shProg->_LinkedShaders[MESA_SHADER_GEOMETRY]->Program : NULL;
struct gl_program *fp = shProg->_LinkedShaders[MESA_SHADER_FRAGMENT] ?
shProg->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program : NULL;
vp->cache_fallback = true;
+ if (tcp)
+ tcp->cache_fallback = true;
+ if (tep)
+ tep->cache_fallback = true;
if (gp)
gp->cache_fallback = true;
if (fp)
@@ -117,6 +125,10 @@ fallback_to_full_recompile(struct brw_context *brw,
_mesa_glsl_link_shader(&brw->ctx, shProg, true);
vp->cache_fallback = false;
+ if (tcp)
+ tcp->cache_fallback = true;
+ if (tep)
+ tep->cache_fallback = true;
if (gp)
gp->cache_fallback = false;
if (fp)
@@ -296,6 +308,8 @@ read_and_upload(struct brw_context *brw, struct program_cache *cache,
struct brw_stage_prog_data *prog_data;
struct brw_wm_prog_key wm_key;
+ struct brw_tcs_prog_key tcs_key;
+ struct brw_tes_prog_key tes_key;
struct brw_gs_prog_key gs_key;
struct brw_vs_prog_key vs_key;
struct brw_stage_state *stage_state;
@@ -316,6 +330,16 @@ read_and_upload(struct brw_context *brw, struct program_cache *cache,
case MESA_SHADER_VERTEX:
gen_shader_sha1(brw, prog, stage, &vs_key, binary_sha1);
break;
+ case MESA_SHADER_TESS_CTRL:
+ brw_tcs_populate_key(brw, &tcs_key);
+ tcs_key.program_string_id = 0;
+ gen_shader_sha1(brw, prog, stage, &tcs_key, binary_sha1);
+ break;
+ case MESA_SHADER_TESS_EVAL:
+ brw_tes_populate_key(brw, &tes_key);
+ tes_key.program_string_id = 0;
+ gen_shader_sha1(brw, prog, stage, &tes_key, binary_sha1);
+ break;
case MESA_SHADER_GEOMETRY:
brw_gs_populate_key(brw, &gs_key);
gs_key.program_string_id = 0;
@@ -369,6 +393,18 @@ read_and_upload(struct brw_context *brw, struct program_cache *cache,
SET_UPLOAD_PRAMS(vs, VS, vp, base.base)
break;
}
+ case MESA_SHADER_TESS_CTRL: {
+ struct brw_tess_ctrl_program *tcp =
+ (struct brw_tess_ctrl_program *)brw->tess_ctrl_program;
+ SET_UPLOAD_PRAMS(tcs, TCS, tcp, base.base)
+ break;
+ }
+ case MESA_SHADER_TESS_EVAL: {
+ struct brw_tess_eval_program *tep =
+ (struct brw_tess_eval_program *)brw->tess_eval_program;
+ SET_UPLOAD_PRAMS(tes, TES, tep, base.base)
+ break;
+ }
case MESA_SHADER_GEOMETRY: {
struct brw_geometry_program *gp =
(struct brw_geometry_program *)brw->geometry_program;
@@ -576,6 +612,36 @@ write_cached_program(struct brw_context *brw)
}
}
+ if (prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]) {
+ struct brw_tcs_prog_key tcs_key;
+ brw_tcs_populate_key(brw, &tcs_key);
+ tcs_key.program_string_id = 0;
+
+ if (!write_program_data(brw, prog, &tcs_key,
+ &brw->tcs.prog_data->base.base,
+ brw->tcs.prog_data->program_size,
+ brw->tcs.prog_data, sizeof *brw->tcs.prog_data,
+ brw->tcs.base.prog_offset, cache,
+ MESA_SHADER_TESS_CTRL)) {
+ return;
+ }
+ }
+
+ if (prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]) {
+ struct brw_tes_prog_key tes_key;
+ brw_tes_populate_key(brw, &tes_key);
+ tes_key.program_string_id = 0;
+
+ if (!write_program_data(brw, prog, &tes_key,
+ &brw->tes.prog_data->base.base,
+ brw->tes.prog_data->program_size,
+ brw->tes.prog_data, sizeof *brw->tes.prog_data,
+ brw->tes.base.prog_offset, cache,
+ MESA_SHADER_TESS_EVAL)) {
+ return;
+ }
+ }
+
if (prog->_LinkedShaders[MESA_SHADER_GEOMETRY]) {
struct brw_gs_prog_key gs_key;
brw_gs_populate_key(brw, &gs_key);
diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c
index da8ef12..ee7e46c 100644
--- a/src/mesa/drivers/dri/i965/brw_tcs.c
+++ b/src/mesa/drivers/dri/i965/brw_tcs.c
@@ -309,6 +309,8 @@ brw_codegen_tcs_prog(struct brw_context *brw,
if (!tcs)
ralloc_free(nir);
+ brw->tcs.prog_data->program_size = program_size;
+
return true;
}
@@ -379,10 +381,24 @@ brw_upload_tcs_prog(struct brw_context *brw)
if (!brw_search_cache(&brw->cache, BRW_CACHE_TCS_PROG,
&key, sizeof(key),
&stage_state->prog_offset, &brw->tcs.prog_data)) {
- bool success = brw_codegen_tcs_prog(brw, current[MESA_SHADER_TESS_CTRL],
- tcp, &key);
- assert(success);
- (void)success;
+#ifdef ENABLE_SHADER_CACHE
+ upload_cached_program(brw, MESA_SHADER_TESS_CTRL);
+
+ /* If upload from disk cache failed call codegen */
+ if (!current[MESA_SHADER_TESS_CTRL] ||
+ !current[MESA_SHADER_TESS_CTRL]->program_written_to_cache) {
+ tcp = (struct brw_tess_ctrl_program *) brw->tess_ctrl_program;
+ if (tcp)
+ tcp->id = key.program_string_id;
+#endif
+ bool success = brw_codegen_tcs_prog(brw,
+ current[MESA_SHADER_TESS_CTRL],
+ tcp, &key);
+ assert(success);
+ (void)success;
+#ifdef ENABLE_SHADER_CACHE
+ }
+#endif
}
brw->tcs.base.prog_data = &brw->tcs.prog_data->base.base;
}
diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c
index 634d685..5a90a92 100644
--- a/src/mesa/drivers/dri/i965/brw_tes.c
+++ b/src/mesa/drivers/dri/i965/brw_tes.c
@@ -226,6 +226,8 @@ brw_codegen_tes_prog(struct brw_context *brw,
&stage_state->prog_offset, &brw->tes.prog_data, tep);
ralloc_free(mem_ctx);
+ brw->tes.prog_data->program_size = program_size;
+
return true;
}
@@ -286,10 +288,23 @@ brw_upload_tes_prog(struct brw_context *brw)
if (!brw_search_cache(&brw->cache, BRW_CACHE_TES_PROG,
&key, sizeof(key),
&stage_state->prog_offset, &brw->tes.prog_data)) {
- bool success = brw_codegen_tes_prog(brw, current[MESA_SHADER_TESS_EVAL],
- tep, &key);
- assert(success);
- (void)success;
+#ifdef ENABLE_SHADER_CACHE
+ upload_cached_program(brw, MESA_SHADER_TESS_EVAL);
+
+ /* If upload from disk cache failed call codegen */
+ if (!current[MESA_SHADER_TESS_EVAL] ||
+ !current[MESA_SHADER_TESS_EVAL]->program_written_to_cache) {
+ tep = (struct brw_tess_eval_program *) brw->tess_eval_program;
+ tep->id = key.program_string_id;
+#endif
+ bool success = brw_codegen_tes_prog(brw,
+ current[MESA_SHADER_TESS_EVAL],
+ tep, &key);
+ assert(success);
+ (void)success;
+#ifdef ENABLE_SHADER_CACHE
+ }
+#endif
}
brw->tes.base.prog_data = &brw->tes.prog_data->base.base;
}
--
2.7.4
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