[Mesa-dev] [PATCH] radeonsi: emit TA_CS_BC_BASE_ADDR on SI only if the kernel allows it

[Edmondo Tommasina]

Reviewed-by: Edmondo Tommasina <edmondo.tommasina at gmail.com>


On Mon, Oct 10, 2016 at 1:25 PM, Marek Olšák <maraeo at gmail.com> wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> The kernel patch has been sent to amd-gfx.
> ---
>  src/gallium/drivers/radeonsi/si_compute.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
> index 1d1df2f..8a803c9 100644
> --- a/src/gallium/drivers/radeonsi/si_compute.c
> +++ b/src/gallium/drivers/radeonsi/si_compute.c
> @@ -244,21 +244,26 @@ static void si_initialize_compute(struct si_context *sctx)
>         }
>
>         /* Set the pointer to border colors. */
>         bc_va = sctx->border_color_buffer->gpu_address;
>
>         if (sctx->b.chip_class >= CIK) {
>                 radeon_set_uconfig_reg_seq(cs, R_030E00_TA_CS_BC_BASE_ADDR, 2);
>                 radeon_emit(cs, bc_va >> 8);  /* R_030E00_TA_CS_BC_BASE_ADDR */
>                 radeon_emit(cs, bc_va >> 40); /* R_030E04_TA_CS_BC_BASE_ADDR_HI */
>         } else {
> -               radeon_set_config_reg(cs, R_00950C_TA_CS_BC_BASE_ADDR, bc_va >> 8);
> +               if (sctx->screen->b.info.drm_major == 3 ||
> +                   (sctx->screen->b.info.drm_major == 2 &&
> +                    sctx->screen->b.info.drm_minor >= 48)) {
> +                       radeon_set_config_reg(cs, R_00950C_TA_CS_BC_BASE_ADDR,
> +                                             bc_va >> 8);
> +               }
>         }
>
>         sctx->cs_shader_state.emitted_program = NULL;
>         sctx->cs_shader_state.initialized = true;
>  }
>
>  static bool si_setup_compute_scratch_buffer(struct si_context *sctx,
>                                              struct si_shader *shader,
>                                              struct si_shader_config *config)
>  {
> --
> 2.7.4
>
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