[Mesa-dev] [PATCH v2 075/103] i965/vec4: do not split scratch read/write opcodes
Iago Toral Quiroga
itoral at igalia.com
Tue Oct 11 09:02:19 UTC 2016
64-bit scratch read/writes require to shuffle data around so we need
to have access to the full 64-bit data. We will do the right thing
for these when we emit the messages.
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index f60334f..75e47f9 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -2034,6 +2034,15 @@ static unsigned
get_lowered_simd_width(const struct gen_device_info *devinfo,
const vec4_instruction *inst)
{
+ /* Do not split some instructions that require special handling */
+ switch (inst->opcode) {
+ case SHADER_OPCODE_GEN4_SCRATCH_READ:
+ case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
+ return inst->exec_size;
+ default:
+ break;
+ }
+
unsigned lowered_width = MIN2(16, inst->exec_size);
/* We need to split some cases of double-precision instructions that write
--
2.7.4
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