[Mesa-dev] [PATCH 26/26] i965: Enable fast clears for multi-lod

[Topi Pohjolainen]

From: Ben Widawsky <ben at bwidawsk.net>

Signed-off-by: Ben Widawsky <benjamin.widawsky at intel.com>
---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 932220e..5769bee 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -256,13 +256,13 @@ intel_miptree_supports_non_msrt_fast_clear(struct brw_context *brw,
       if (arrayed)
          assert(mt->num_samples <= 1);
 
-      if (mip_mapped && brw->gen >= 8) {
+      if (mip_mapped && brw->gen < 8) {
          perf_debug("Multi-LOD fast clear - giving up (%dx%dx%d).\n",
                     mt->logical_width0, mt->logical_height0, mt->last_level);
          return false;
       }
 
-      if (arrayed && brw->gen >= 8) {
+      if (arrayed && brw->gen < 8) {
          perf_debug("Layered fast clear - giving up. (%dx%d%d)\n",
                     mt->logical_width0, mt->logical_height0,
                     mt->physical_depth0);
@@ -1637,7 +1637,7 @@ intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,
       ALIGN(mt->logical_width0, width_divisor) / width_divisor;
    unsigned mcs_height =
       ALIGN(mt->logical_height0, height_divisor) / height_divisor;
-   assert(mt->logical_depth0 == 1);
+   assert(brw->gen >= 8 || mt->logical_depth0 == 1);
    uint32_t layout_flags = MIPTREE_LAYOUT_TILING_Y;
 
    if (brw->gen >= 8) {
-- 
2.5.5