[Mesa-dev] [PATCH 3/4] st/glsl_to_tgsi: remove unnecessary ir_instruction argument from get_opcode

[Marek Olšák]

For 1-3:

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

Marek

On Wed, Oct 12, 2016 at 7:50 PM, Nicolai Hähnle <nhaehnle at gmail.com> wrote:
> From: Nicolai Hähnle <nicolai.haehnle at amd.com>
>
> ---
>  src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> index be0aa2e..fd2485d 100644
> --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> @@ -520,21 +520,21 @@ public:
>                                        st_src_reg src2 = undef_src,
>                                        st_src_reg src3 = undef_src);
>
>     glsl_to_tgsi_instruction *emit_asm(ir_instruction *ir, unsigned op,
>                                        st_dst_reg dst, st_dst_reg dst1,
>                                        st_src_reg src0 = undef_src,
>                                        st_src_reg src1 = undef_src,
>                                        st_src_reg src2 = undef_src,
>                                        st_src_reg src3 = undef_src);
>
> -   unsigned get_opcode(ir_instruction *ir, unsigned op,
> +   unsigned get_opcode(unsigned op,
>                      st_dst_reg dst,
>                      st_src_reg src0, st_src_reg src1);
>
>     /**
>      * Emit the correct dot-product instruction for the type of arguments
>      */
>     glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
>                                       st_dst_reg dst,
>                                       st_src_reg src0,
>                                       st_src_reg src1,
> @@ -662,21 +662,21 @@ num_inst_src_regs(const glsl_to_tgsi_instruction *op)
>  glsl_to_tgsi_instruction *
>  glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned op,
>                                 st_dst_reg dst, st_dst_reg dst1,
>                                 st_src_reg src0, st_src_reg src1,
>                                 st_src_reg src2, st_src_reg src3)
>  {
>     glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
>     int num_reladdr = 0, i, j;
>     bool dst_is_64bit[2];
>
> -   op = get_opcode(ir, op, dst, src0, src1);
> +   op = get_opcode(op, dst, src0, src1);
>
>     /* If we have to do relative addressing, we want to load the ARL
>      * reg directly for one of the regs, and preload the other reladdr
>      * sources into temps.
>      */
>     num_reladdr += dst.reladdr != NULL || dst.reladdr2;
>     num_reladdr += dst1.reladdr != NULL || dst1.reladdr2;
>     num_reladdr += src0.reladdr != NULL || src0.reladdr2 != NULL;
>     num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL;
>     num_reladdr += src2.reladdr != NULL || src2.reladdr2 != NULL;
> @@ -893,21 +893,21 @@ glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned op,
>                                 st_src_reg src2, st_src_reg src3)
>  {
>     return emit_asm(ir, op, dst, undef_dst, src0, src1, src2, src3);
>  }
>
>  /**
>   * Determines whether to use an integer, unsigned integer, or float opcode
>   * based on the operands and input opcode, then emits the result.
>   */
>  unsigned
> -glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
> +glsl_to_tgsi_visitor::get_opcode(unsigned op,
>                                   st_dst_reg dst,
>                                   st_src_reg src0, st_src_reg src1)
>  {
>     enum glsl_base_type type = GLSL_TYPE_FLOAT;
>
>     if (op == TGSI_OPCODE_MOV)
>         return op;
>
>     assert(src0.type != GLSL_TYPE_ARRAY);
>     assert(src0.type != GLSL_TYPE_STRUCT);
> --
> 2.7.4
>
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