[Mesa-dev] [PATCH v2 021/103] i965/vec4: implement double unpacking

Ian Romanick idr at freedesktop.org
Wed Oct 19 00:40:19 UTC 2016


This patch is

Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>

On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> index 04f70ef..2631bf3 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> @@ -1538,6 +1538,18 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
>        break;
>     }
>  
> +   case nir_op_unpack_double_2x32_split_x:
> +   case nir_op_unpack_double_2x32_split_y: {
> +      enum opcode oper = (instr->op == nir_op_unpack_double_2x32_split_x) ?
> +         VEC4_OPCODE_PICK_LOW_32BIT : VEC4_OPCODE_PICK_HIGH_32BIT;
> +      dst_reg tmp = dst_reg(this, glsl_type::dvec4_type);
> +      emit(MOV(tmp, op[0]));
> +      dst_reg tmp2 = dst_reg(this, glsl_type::uvec4_type);
> +      emit(oper, tmp2, src_reg(tmp));
> +      emit(MOV(dst, src_reg(tmp2)));
> +      break;
> +   }
> +
>     case nir_op_unpack_half_2x16:
>        /* As NIR does not guarantee that we have a correct swizzle outside the
>         * boundaries of a vector, and the implementation of emit_unpack_half_2x16
> 



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