[Mesa-dev] [PATCH 08/25] intel/genxml: Make some VS/GS fields consistent across gens

[Jason Ekstrand]

We use the names from gen8+
---
 src/intel/genxml/gen6.xml        | 6 +++---
 src/intel/genxml/gen7.xml        | 6 +++---
 src/intel/genxml/gen75.xml       | 6 +++---
 src/intel/vulkan/gen7_pipeline.c | 6 +++---
 4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 7ba8954..980a74c 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -1047,7 +1047,7 @@
     <field name="Per-Thread Scratch Space" start="96" end="99" type="uint"/>
     <field name="Vertex URB Entry Read Length" start="139" end="144" type="uint"/>
     <field name="Vertex URB Entry Read Offset" start="132" end="137" type="uint"/>
-    <field name="Dispatch GRF Start Register for URB Data" start="128" end="131" type="uint"/>
+    <field name="Dispatch GRF Start Register For URB Data" start="128" end="131" type="uint"/>
     <field name="Maximum Number of Threads" start="185" end="191" type="uint"/>
     <field name="GS Statistics Enable" start="170" end="170" type="bool"/>
     <field name="SO Statistics Enable" start="169" end="169" type="bool"/>
@@ -1423,13 +1423,13 @@
     <field name="Software  Exception Enable" start="71" end="71" type="bool"/>
     <field name="Scratch Space Base Pointer" start="106" end="127" type="address"/>
     <field name="Per-Thread Scratch Space" start="96" end="99" type="uint"/>
-    <field name="Dispatch GRF Start Register for URB Data" start="148" end="152" type="uint"/>
+    <field name="Dispatch GRF Start Register For URB Data" start="148" end="152" type="uint"/>
     <field name="Vertex URB Entry Read Length" start="139" end="144" type="uint"/>
     <field name="Vertex URB Entry Read Offset" start="132" end="137" type="uint"/>
     <field name="Maximum Number of Threads" start="185" end="191" type="uint"/>
     <field name="Statistics Enable" start="170" end="170" type="bool"/>
     <field name="Vertex Cache Disable" start="161" end="161" type="bool"/>
-    <field name="VS Function Enable" start="160" end="160" type="bool"/>
+    <field name="Function Enable" start="160" end="160" type="bool"/>
   </instruction>
 
   <instruction name="3DSTATE_WM" bias="2" length="9">
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 8461bd0..5d8eeb2 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -1181,7 +1181,7 @@
     <field name="Vertex URB Entry Read Length" start="139" end="144" type="uint"/>
     <field name="Include Vertex Handles" start="138" end="138" type="bool"/>
     <field name="Vertex URB Entry Read Offset" start="132" end="137" type="uint"/>
-    <field name="Dispatch GRF Start Register for URB Data" start="128" end="131" type="uint"/>
+    <field name="Dispatch GRF Start Register For URB Data" start="128" end="131" type="uint"/>
     <field name="Maximum Number of Threads" start="185" end="191" type="uint"/>
     <field name="Control Data Format" start="184" end="184" type="uint">
       <value name="GSCTL_CUT" value="0"/>
@@ -1886,13 +1886,13 @@
     <field name="Software  Exception Enable" start="71" end="71" type="bool"/>
     <field name="Scratch Space Base Pointer" start="106" end="127" type="address"/>
     <field name="Per-Thread Scratch Space" start="96" end="99" type="uint"/>
-    <field name="Dispatch GRF Start Register for URB Data" start="148" end="152" type="uint"/>
+    <field name="Dispatch GRF Start Register For URB Data" start="148" end="152" type="uint"/>
     <field name="Vertex URB Entry Read Length" start="139" end="144" type="uint"/>
     <field name="Vertex URB Entry Read Offset" start="132" end="137" type="uint"/>
     <field name="Maximum Number of Threads" start="185" end="191" type="uint"/>
     <field name="Statistics Enable" start="170" end="170" type="bool"/>
     <field name="Vertex Cache Disable" start="161" end="161" type="bool"/>
-    <field name="VS Function Enable" start="160" end="160" type="bool"/>
+    <field name="Function Enable" start="160" end="160" type="bool"/>
   </instruction>
 
   <instruction name="3DSTATE_WM" bias="2" length="3">
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 168c5cc..32d95a5 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -1400,7 +1400,7 @@
     <field name="Vertex URB Entry Read Length" start="139" end="144" type="uint"/>
     <field name="Include Vertex Handles" start="138" end="138" type="bool"/>
     <field name="Vertex URB Entry Read Offset" start="132" end="137" type="uint"/>
-    <field name="Dispatch GRF Start Register for URB Data" start="128" end="131" type="uint"/>
+    <field name="Dispatch GRF Start Register For URB Data" start="128" end="131" type="uint"/>
     <field name="Maximum Number of Threads" start="184" end="191" type="uint"/>
     <field name="Control Data Header Size" start="180" end="183" type="uint"/>
     <field name="Instance Control" start="175" end="179" type="uint"/>
@@ -2159,13 +2159,13 @@
     <field name="Software  Exception Enable" start="71" end="71" type="bool"/>
     <field name="Scratch Space Base Pointer" start="106" end="127" type="address"/>
     <field name="Per-Thread Scratch Space" start="96" end="99" type="uint"/>
-    <field name="Dispatch GRF Start Register for URB Data" start="148" end="152" type="uint"/>
+    <field name="Dispatch GRF Start Register For URB Data" start="148" end="152" type="uint"/>
     <field name="Vertex URB Entry Read Length" start="139" end="144" type="uint"/>
     <field name="Vertex URB Entry Read Offset" start="132" end="137" type="uint"/>
     <field name="Maximum Number of Threads" start="183" end="191" type="uint"/>
     <field name="Statistics Enable" start="170" end="170" type="bool"/>
     <field name="Vertex Cache Disable" start="161" end="161" type="bool"/>
-    <field name="VS Function Enable" start="160" end="160" type="bool"/>
+    <field name="Function Enable" start="160" end="160" type="bool"/>
   </instruction>
 
   <instruction name="3DSTATE_WM" bias="2" length="3">
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 4ffb16c..a3f9aa8 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -120,14 +120,14 @@ genX(graphics_pipeline_create)(
          };
          vs.PerThreadScratchSpace      = scratch_space(&vs_prog_data->base.base);
 
-         vs.DispatchGRFStartRegisterforURBData    =
+         vs.DispatchGRFStartRegisterForURBData    =
             vs_prog_data->base.base.dispatch_grf_start_reg;
 
          vs.VertexURBEntryReadLength   = vs_prog_data->base.urb_read_length;
          vs.VertexURBEntryReadOffset   = 0;
          vs.MaximumNumberofThreads     = devinfo->max_vs_threads - 1;
          vs.StatisticsEnable           = true;
-         vs.VSFunctionEnable           = true;
+         vs.FunctionEnable             = true;
       }
 
    const struct brw_gs_prog_data *gs_prog_data = get_gs_prog_data(pipeline);
@@ -151,7 +151,7 @@ genX(graphics_pipeline_create)(
          gs.VertexURBEntryReadLength   = gs_prog_data->base.urb_read_length;
          gs.IncludeVertexHandles       = gs_prog_data->base.include_vue_handles;
 
-         gs.DispatchGRFStartRegisterforURBData =
+         gs.DispatchGRFStartRegisterForURBData =
             gs_prog_data->base.base.dispatch_grf_start_reg;
 
          gs.MaximumNumberofThreads     = devinfo->max_gs_threads - 1;
-- 
2.5.0.400.gff86faf