[Mesa-dev] [PATCH] gallium/radeon: make sure HTILE address is aligned properly

[Bas Nieuwenhuizen]

Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

On Mon, Oct 24, 2016 at 9:39 PM, Marek Olšák <maraeo at gmail.com> wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> This should fix random GPU hangs on Hawaii and Fiji.
> It's already been fixed in 13.0 and later.
>
> Cc: 11.2 12.0 <mesa-stable at lists.freedesktop.org>
> ---
>  src/gallium/drivers/radeon/r600_texture.c | 17 ++++++++++-------
>  1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
> index 23ddff4..b867f85 100644
> --- a/src/gallium/drivers/radeon/r600_texture.c
> +++ b/src/gallium/drivers/radeon/r600_texture.c
> @@ -722,10 +722,11 @@ static void r600_texture_alloc_cmask_separate(struct r600_common_screen *rscreen
>  }
>
>  static unsigned r600_texture_get_htile_size(struct r600_common_screen *rscreen,
> -                                           struct r600_texture *rtex)
> +                                           struct r600_texture *rtex,
> +                                           unsigned *base_align)
>  {
>         unsigned cl_width, cl_height, width, height;
> -       unsigned slice_elements, slice_bytes, pipe_interleave_bytes, base_align;
> +       unsigned slice_elements, slice_bytes, pipe_interleave_bytes;
>         unsigned num_pipes = rscreen->info.num_tile_pipes;
>
>         if (rscreen->chip_class <= EVERGREEN &&
> @@ -787,7 +788,7 @@ static unsigned r600_texture_get_htile_size(struct r600_common_screen *rscreen,
>         slice_bytes = slice_elements * 4;
>
>         pipe_interleave_bytes = rscreen->info.pipe_interleave_bytes;
> -       base_align = num_pipes * pipe_interleave_bytes;
> +       *base_align = num_pipes * pipe_interleave_bytes;
>
>         rtex->htile.pitch = width;
>         rtex->htile.height = height;
> @@ -795,20 +796,22 @@ static unsigned r600_texture_get_htile_size(struct r600_common_screen *rscreen,
>         rtex->htile.yalign = cl_height * 8;
>
>         return (util_max_layer(&rtex->resource.b.b, 0) + 1) *
> -               align(slice_bytes, base_align);
> +               align(slice_bytes, *base_align);
>  }
>
>  static void r600_texture_allocate_htile(struct r600_common_screen *rscreen,
>                                         struct r600_texture *rtex)
>  {
> -       unsigned htile_size = r600_texture_get_htile_size(rscreen, rtex);
> +       unsigned alignment = 0;
> +       unsigned htile_size = r600_texture_get_htile_size(rscreen, rtex,
> +                                                         &alignment);
>
>         if (!htile_size)
>                 return;
>
>         rtex->htile_buffer = (struct r600_resource*)
> -                            pipe_buffer_create(&rscreen->b, PIPE_BIND_CUSTOM,
> -                                               PIPE_USAGE_DEFAULT, htile_size);
> +               r600_aligned_buffer_create(&rscreen->b, 0, PIPE_USAGE_DEFAULT,
> +                                          htile_size, alignment);
>         if (rtex->htile_buffer == NULL) {
>                 /* this is not a fatal error as we can still keep rendering
>                  * without htile buffer */
> --
> 2.7.4
>
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