[Mesa-dev] [PATCH 09/24] radeon/vce: use nblk_y instead of npix_y
Marek Olšák
maraeo at gmail.com
Mon Oct 24 22:33:09 UTC 2016
From: Marek Olšák <marek.olsak at amd.com>
npix_y will be removed. level[0].npix_y will be removed too. nblk_y should
be the same as npix_y if the block height == 1. However, nblk_y is aligned
to the tile size, so it can be greater than npix_y.
If that's a problem, we'll have to save the input height of surface_init
and use that.
---
src/gallium/drivers/radeon/radeon_vce.c | 4 ++--
src/gallium/drivers/radeon/radeon_vce_40_2_2.c | 4 ++--
src/gallium/drivers/radeon/radeon_vce_50.c | 2 +-
src/gallium/drivers/radeon/radeon_vce_52.c | 4 ++--
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c
index ef93e46..7e7bf2a 100644
--- a/src/gallium/drivers/radeon/radeon_vce.c
+++ b/src/gallium/drivers/radeon/radeon_vce.c
@@ -217,21 +217,21 @@ struct rvce_cpb_slot *l1_slot(struct rvce_encoder *enc)
return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next->next, list);
}
/**
* Calculate the offsets into the CPB
*/
void rvce_frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot,
signed *luma_offset, signed *chroma_offset)
{
unsigned pitch = align(enc->luma->level[0].pitch_bytes, 128);
- unsigned vpitch = align(enc->luma->npix_y, 16);
+ unsigned vpitch = align(enc->luma->level[0].nblk_y, 16);
unsigned fsize = pitch * (vpitch + vpitch / 2);
*luma_offset = slot->index * fsize;
*chroma_offset = *luma_offset + pitch * vpitch;
}
/**
* destroy this video encoder
*/
static void rvce_destroy(struct pipe_video_codec *encoder)
@@ -448,21 +448,21 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
RVID_ERR("Can't create video buffer.\n");
goto error;
}
enc->cpb_num = get_cpb_num(enc);
if (!enc->cpb_num)
goto error;
get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf);
cpb_size = align(tmp_surf->level[0].pitch_bytes, 128);
- cpb_size = cpb_size * align(tmp_surf->npix_y, 32);
+ cpb_size = cpb_size * align(tmp_surf->level[0].nblk_y, 32);
cpb_size = cpb_size * 3 / 2;
cpb_size = cpb_size * enc->cpb_num;
if (enc->dual_pipe)
cpb_size += RVCE_MAX_AUX_BUFFER_NUM *
RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE * 2;
tmp_buf->destroy(tmp_buf);
if (!rvid_create_buffer(enc->screen, &enc->cpb, cpb_size, PIPE_USAGE_DEFAULT)) {
RVID_ERR("Can't create CPB buffer.\n");
goto error;
}
diff --git a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
index fe15ded..f194063 100644
--- a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
+++ b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
@@ -89,21 +89,21 @@ static void create(struct rvce_encoder *enc)
RVCE_BEGIN(0x01000001); // create cmd
RVCE_CS(0x00000000); // encUseCircularBuffer
RVCE_CS(profiles[enc->base.profile -
PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE]); // encProfile
RVCE_CS(enc->base.level); // encLevel
RVCE_CS(0x00000000); // encPicStructRestriction
RVCE_CS(enc->base.width); // encImageWidth
RVCE_CS(enc->base.height); // encImageHeight
RVCE_CS(enc->luma->level[0].pitch_bytes); // encRefPicLumaPitch
RVCE_CS(enc->chroma->level[0].pitch_bytes); // encRefPicChromaPitch
- RVCE_CS(align(enc->luma->npix_y, 16) / 8); // encRefYHeightInQw
+ RVCE_CS(align(enc->luma->level[0].nblk_y, 16) / 8); // encRefYHeightInQw
RVCE_CS(0x00000000); // encRefPic(Addr|Array)Mode, encPicStructRestriction, disableRDO
RVCE_END();
}
static void rate_control(struct rvce_encoder *enc)
{
RVCE_BEGIN(0x04000005); // rate control
RVCE_CS(enc->pic.rate_ctrl.rate_ctrl_method); // encRateControlMethod
RVCE_CS(enc->pic.rate_ctrl.target_bitrate); // encRateControlTargetBitRate
RVCE_CS(enc->pic.rate_ctrl.peak_bitrate); // encRateControlPeakBitRate
@@ -316,21 +316,21 @@ static void encode(struct rvce_encoder *enc)
RVCE_CS(0x00000000); // pictureStructure
RVCE_CS(enc->bs_size); // allowedMaxBitstreamSize
RVCE_CS(0x00000000); // forceRefreshMap
RVCE_CS(0x00000000); // insertAUD
RVCE_CS(0x00000000); // endOfSequence
RVCE_CS(0x00000000); // endOfStream
RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
enc->luma->level[0].offset); // inputPictureLumaAddressHi/Lo
RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
enc->chroma->level[0].offset); // inputPictureChromaAddressHi/Lo
- RVCE_CS(align(enc->luma->npix_y, 16)); // encInputFrameYPitch
+ RVCE_CS(align(enc->luma->level[0].nblk_y, 16)); // encInputFrameYPitch
RVCE_CS(enc->luma->level[0].pitch_bytes); // encInputPicLumaPitch
RVCE_CS(enc->chroma->level[0].pitch_bytes); // encInputPicChromaPitch
RVCE_CS(0x00000000); // encInputPic(Addr|Array)Mode
RVCE_CS(0x00000000); // encInputPicTileConfig
RVCE_CS(enc->pic.picture_type); // encPicType
RVCE_CS(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR); // encIdrFlag
RVCE_CS(0x00000000); // encIdrPicId
RVCE_CS(0x00000000); // encMGSKeyPic
RVCE_CS(!enc->pic.not_referenced); // encReferenceFlag
RVCE_CS(0x00000000); // encTemporalLayerIndex
diff --git a/src/gallium/drivers/radeon/radeon_vce_50.c b/src/gallium/drivers/radeon/radeon_vce_50.c
index 262e13b..a2877f8 100644
--- a/src/gallium/drivers/radeon/radeon_vce_50.c
+++ b/src/gallium/drivers/radeon/radeon_vce_50.c
@@ -123,21 +123,21 @@ static void encode(struct rvce_encoder *enc)
RVCE_CS(0x00000000); // pictureStructure
RVCE_CS(enc->bs_size); // allowedMaxBitstreamSize
RVCE_CS(0x00000000); // forceRefreshMap
RVCE_CS(0x00000000); // insertAUD
RVCE_CS(0x00000000); // endOfSequence
RVCE_CS(0x00000000); // endOfStream
RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
enc->luma->level[0].offset); // inputPictureLumaAddressHi/Lo
RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
enc->chroma->level[0].offset); // inputPictureChromaAddressHi/Lo
- RVCE_CS(align(enc->luma->npix_y, 16)); // encInputFrameYPitch
+ RVCE_CS(align(enc->luma->level[0].nblk_y, 16)); // encInputFrameYPitch
RVCE_CS(enc->luma->level[0].pitch_bytes); // encInputPicLumaPitch
RVCE_CS(enc->chroma->level[0].pitch_bytes); // encInputPicChromaPitch
if (enc->dual_pipe)
RVCE_CS(0x00000000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading)
else
RVCE_CS(0x00010000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading)
RVCE_CS(0x00000000); // encInputPicTileConfig
RVCE_CS(enc->pic.picture_type); // encPicType
RVCE_CS(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR); // encIdrFlag
RVCE_CS(0x00000000); // encIdrPicId
diff --git a/src/gallium/drivers/radeon/radeon_vce_52.c b/src/gallium/drivers/radeon/radeon_vce_52.c
index 5db01fe..0922f13 100644
--- a/src/gallium/drivers/radeon/radeon_vce_52.c
+++ b/src/gallium/drivers/radeon/radeon_vce_52.c
@@ -172,21 +172,21 @@ static void create(struct rvce_encoder *enc)
RVCE_BEGIN(0x01000001); // create cmd
RVCE_CS(enc->enc_pic.ec.enc_use_circular_buffer);
RVCE_CS(profiles[enc->base.profile -
PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE]); // encProfile
RVCE_CS(enc->base.level); // encLevel
RVCE_CS(enc->enc_pic.ec.enc_pic_struct_restriction);
RVCE_CS(enc->base.width); // encImageWidth
RVCE_CS(enc->base.height); // encImageHeight
RVCE_CS(enc->luma->level[0].pitch_bytes); // encRefPicLumaPitch
RVCE_CS(enc->chroma->level[0].pitch_bytes); // encRefPicChromaPitch
- RVCE_CS(align(enc->luma->npix_y, 16) / 8); // encRefYHeightInQw
+ RVCE_CS(align(enc->luma->level[0].nblk_y, 16) / 8); // encRefYHeightInQw
RVCE_CS(enc->enc_pic.addrmode_arraymode_disrdo_distwoinstants);
RVCE_CS(enc->enc_pic.ec.enc_pre_encode_context_buffer_offset);
RVCE_CS(enc->enc_pic.ec.enc_pre_encode_input_luma_buffer_offset);
RVCE_CS(enc->enc_pic.ec.enc_pre_encode_input_chroma_buffer_offset);
RVCE_CS(enc->enc_pic.ec.enc_pre_encode_mode_chromaflag_vbaqmode_scenechangesensitivity);
RVCE_END();
}
static void encode(struct rvce_encoder *enc)
@@ -236,21 +236,21 @@ static void encode(struct rvce_encoder *enc)
RVCE_CS(enc->enc_pic.eo.picture_structure);
RVCE_CS(enc->bs_size); // allowedMaxBitstreamSize
RVCE_CS(enc->enc_pic.eo.force_refresh_map);
RVCE_CS(enc->enc_pic.eo.insert_aud);
RVCE_CS(enc->enc_pic.eo.end_of_sequence);
RVCE_CS(enc->enc_pic.eo.end_of_stream);
RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
enc->luma->level[0].offset); // inputPictureLumaAddressHi/Lo
RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
enc->chroma->level[0].offset); // inputPictureChromaAddressHi/Lo
- RVCE_CS(align(enc->luma->npix_y, 16)); // encInputFrameYPitch
+ RVCE_CS(align(enc->luma->level[0].nblk_y, 16)); // encInputFrameYPitch
RVCE_CS(enc->luma->level[0].pitch_bytes); // encInputPicLumaPitch
RVCE_CS(enc->chroma->level[0].pitch_bytes); // encInputPicChromaPitch
if (enc->dual_pipe)
enc->enc_pic.eo.enc_input_pic_addr_array_disable2pipe_disablemboffload = 0x00000000;
else
enc->enc_pic.eo.enc_input_pic_addr_array_disable2pipe_disablemboffload = 0x00010000;
RVCE_CS(enc->enc_pic.eo.enc_input_pic_addr_array_disable2pipe_disablemboffload);
RVCE_CS(enc->enc_pic.eo.enc_input_pic_tile_config);
RVCE_CS(enc->enc_pic.picture_type); // encPicType
RVCE_CS(enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR); // encIdrFlag
--
2.7.4
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