[Mesa-dev] [PATCH] radv: add support for anisotropic filtering on VI+

[Fredrik Höglund]

On Thursday 27 October 2016, Roland Scheidegger wrote:
> On 10/26/2016 06:02 PM, Fredrik Höglund wrote:
> > Ported from radeonsi.
> > ---
> >  src/amd/vulkan/radv_device.c | 30 +++++++++++++++++++++++++++---
> >  1 file changed, 27 insertions(+), 3 deletions(-)
> >
> > diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
> > index 512d366..9184308 100644
> > --- a/src/amd/vulkan/radv_device.c
> > +++ b/src/amd/vulkan/radv_device.c
> > @@ -1742,26 +1742,50 @@ radv_tex_bordercolor(VkBorderColor bcolor)
> >  	return 0;
> >  }
> >
> > +static unsigned
> > +radv_tex_aniso_filter(unsigned filter)
> > +{
> > +	if (filter < 2)
> > +		return 0;
> > +	if (filter < 4)
> > +		return 1;
> > +	if (filter < 8)
> > +		return 2;
> > +	if (filter < 16)
> > +		return 3;
> > +	return 4;
> > +}
> > +
> >  static void
> >  radv_init_sampler(struct radv_device *device,
> >  		  struct radv_sampler *sampler,
> >  		  const VkSamplerCreateInfo *pCreateInfo)
> >  {
> > -	uint32_t max_aniso = 0;
> > -	uint32_t max_aniso_ratio = 0;//TODO
> > +	uint32_t max_aniso = pCreateInfo->anisotropyEnable && pCreateInfo->maxAnisotropy > 1.0 ?
> > +					(uint32_t) pCreateInfo->maxAnisotropy : 0;
> > +	uint32_t max_aniso_ratio = radv_tex_aniso_filter(max_aniso);
> >  	bool is_vi;
> >  	is_vi = (device->instance->physicalDevice.rad_info.chip_class >= VI);
> >
> > +	if (!is_vi && max_aniso > 0) {
> > +		radv_finishme("Anisotropic filtering must be disabled manually "
> > +		              "by the shader on SI-CI when BASE_LEVEL == LAST_LEVEL\n");
> > +		max_ansi = max_aniso_ratio = 0;
> Does that really compile? I don't see any such variable.

No, it does not.  It turns out I fixed that locally, but in the wrong commit.

> (I'm actually curious what happens if you don't disable aniso in this 
> case, does the math end up all crazy and it samples completely wrong 
> texels? Seems rather lame...)

I'm curious about that myself.  But I don't own any of the GPU's that
need the workaround, so I can't tell you.

> Roland
> 
> 
> > +	}
> > +
> >  	sampler->state[0] = (S_008F30_CLAMP_X(radv_tex_wrap(pCreateInfo->addressModeU)) |
> >  			     S_008F30_CLAMP_Y(radv_tex_wrap(pCreateInfo->addressModeV)) |
> >  			     S_008F30_CLAMP_Z(radv_tex_wrap(pCreateInfo->addressModeW)) |
> >  			     S_008F30_MAX_ANISO_RATIO(max_aniso_ratio) |
> >  			     S_008F30_DEPTH_COMPARE_FUNC(radv_tex_compare(pCreateInfo->compareOp)) |
> >  			     S_008F30_FORCE_UNNORMALIZED(pCreateInfo->unnormalizedCoordinates ? 1 : 0) |
> > +			     S_008F30_ANISO_THRESHOLD(max_aniso_ratio >> 1) |
> > +			     S_008F30_ANISO_BIAS(max_aniso_ratio) |
> >  			     S_008F30_DISABLE_CUBE_WRAP(0) |
> >  			     S_008F30_COMPAT_MODE(is_vi));
> >  	sampler->state[1] = (S_008F34_MIN_LOD(S_FIXED(CLAMP(pCreateInfo->minLod, 0, 15), 8)) |
> > -			     S_008F34_MAX_LOD(S_FIXED(CLAMP(pCreateInfo->maxLod, 0, 15), 8)));
> > +			     S_008F34_MAX_LOD(S_FIXED(CLAMP(pCreateInfo->maxLod, 0, 15), 8)) |
> > +			     S_008F34_PERF_MIP(max_aniso_ratio ? max_aniso_ratio + 6 : 0));
> >  	sampler->state[2] = (S_008F38_LOD_BIAS(S_FIXED(CLAMP(pCreateInfo->mipLodBias, -16, 16), 8)) |
> >  			     S_008F38_XY_MAG_FILTER(radv_tex_filter(pCreateInfo->magFilter, max_aniso)) |
> >  			     S_008F38_XY_MIN_FILTER(radv_tex_filter(pCreateInfo->minFilter, max_aniso)) |
> >
> 
>