[Mesa-dev] [PATCH] i965: Allow a per gen timebase scale factor
Matt Turner
mattst88 at gmail.com
Fri Oct 28 00:04:51 UTC 2016
On Thu, Oct 27, 2016 at 4:56 PM, Robert Bragg <robert at sixbynine.org> wrote:
> Prior to Skylake the Gen HW timestamps were driven by a 12.5MHz clock
> with the convenient property of being able to scale by an integer (80)
> to nanosecond units.
>
> For Skylake the frequency is 12MHz or a scale factor of 83.333333
>
> This updates gen_device_info to track a floating point timebase_scale
> factor and makes corresponding _queryobj.c changes to no longer assume a
> scale factor of 80 works across all gens.
>
> Although the gen6_ code could have been been left alone, the changes
> keep the code more comparable, and it now shares a few utility functions
> for scaling raw timestamps and calculating deltas. The utility for
> calculating deltas takes into account 32 or 36bit overflow depending on
> the current kernel version.
>
> Note: this leaves the timestamp handling of ARB_query_buffer_object
> untouched, which continues to use an incorrect scale of 80 on Skylake
> for now. This is more awkward to solve since the scaling is currently
> done using a very limited uint64 ALU available to the command parser
> that doesn't support multiply or divide where it's already taking a
> large number of instructions just to effectively multiple by 80.
>
> This fixes piglit arb_timer_query-timestamp-get on Skylake
>
> Signed-off-by: Robert Bragg <robert at sixbynine.org>
> ---
> src/intel/common/gen_device_info.c | 21 +++++++++---
> src/intel/common/gen_device_info.h | 24 ++++++++++++++
> src/mesa/drivers/dri/i965/brw_context.c | 15 +++++++++
> src/mesa/drivers/dri/i965/brw_context.h | 3 ++
> src/mesa/drivers/dri/i965/brw_queryobj.c | 53 ++++++++++++++++++++++++++++---
> src/mesa/drivers/dri/i965/gen6_queryobj.c | 28 +++++-----------
> 6 files changed, 115 insertions(+), 29 deletions(-)
>
> diff --git a/src/intel/common/gen_device_info.c b/src/intel/common/gen_device_info.c
> index 30df0b2..20594b0 100644
> --- a/src/intel/common/gen_device_info.c
> +++ b/src/intel/common/gen_device_info.c
> @@ -35,6 +35,7 @@ static const struct gen_device_info gen_device_info_i965 = {
> .urb = {
> .size = 256,
> },
> + .timebase_scale = 80,
> };
>
> static const struct gen_device_info gen_device_info_g4x = {
> @@ -50,6 +51,7 @@ static const struct gen_device_info gen_device_info_g4x = {
> .urb = {
> .size = 384,
> },
> + .timebase_scale = 80,
> };
>
> static const struct gen_device_info gen_device_info_ilk = {
> @@ -64,6 +66,7 @@ static const struct gen_device_info gen_device_info_ilk = {
> .urb = {
> .size = 1024,
> },
> + .timebase_scale = 80,
> };
>
> static const struct gen_device_info gen_device_info_snb_gt1 = {
> @@ -84,6 +87,7 @@ static const struct gen_device_info gen_device_info_snb_gt1 = {
> .max_vs_entries = 256,
> .max_gs_entries = 256,
> },
> + .timebase_scale = 80,
> };
>
> static const struct gen_device_info gen_device_info_snb_gt2 = {
> @@ -104,6 +108,7 @@ static const struct gen_device_info gen_device_info_snb_gt2 = {
> .max_vs_entries = 256,
> .max_gs_entries = 256,
> },
> + .timebase_scale = 80,
> };
>
> #define GEN7_FEATURES \
> @@ -112,7 +117,8 @@ static const struct gen_device_info gen_device_info_snb_gt2 = {
> .must_use_separate_stencil = true, \
> .has_llc = true, \
> .has_pln = true, \
> - .has_surface_tile_offset = true
> + .has_surface_tile_offset = true, \
> + .timebase_scale = 80
>
> static const struct gen_device_info gen_device_info_ivb_gt1 = {
> GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
> @@ -254,7 +260,8 @@ static const struct gen_device_info gen_device_info_hsw_gt3 = {
> .max_tcs_threads = 504, \
> .max_tes_threads = 504, \
> .max_gs_threads = 504, \
> - .max_wm_threads = 384
> + .max_wm_threads = 384, \
> + .timebase_scale = 80
>
> static const struct gen_device_info gen_device_info_bdw_gt1 = {
> GEN8_FEATURES, .gt = 1,
> @@ -351,16 +358,19 @@ static const struct gen_device_info gen_device_info_skl_gt1 = {
> GEN9_FEATURES, .gt = 1,
> .num_slices = 1,
> .urb.size = 192,
> + .timebase_scale = 1000000000.0 / 12000000.0,
> };
>
> static const struct gen_device_info gen_device_info_skl_gt2 = {
> GEN9_FEATURES, .gt = 2,
> .num_slices = 1,
> + .timebase_scale = 1000000000.0 / 12000000.0,
> };
>
> static const struct gen_device_info gen_device_info_skl_gt3 = {
> GEN9_FEATURES, .gt = 3,
> .num_slices = 2,
> + .timebase_scale = 1000000000.0 / 12000000.0,
> };
>
> static const struct gen_device_info gen_device_info_skl_gt4 = {
> @@ -375,6 +385,7 @@ static const struct gen_device_info gen_device_info_skl_gt4 = {
> * only 1008KB of this will be used."
> */
> .urb.size = 1008 / 3,
> + .timebase_scale = 1000000000.0 / 12000000.0,
> };
>
> static const struct gen_device_info gen_device_info_bxt = {
> @@ -397,7 +408,8 @@ static const struct gen_device_info gen_device_info_bxt = {
> .max_tcs_entries = 256,
> .max_tes_entries = 416,
> .max_gs_entries = 256,
> - }
> + },
> + .timebase_scale = 1000000000.0 / 19200123.0,
> };
>
> static const struct gen_device_info gen_device_info_bxt_2x6 = {
> @@ -420,7 +432,8 @@ static const struct gen_device_info gen_device_info_bxt_2x6 = {
> .max_tcs_entries = 128,
> .max_tes_entries = 208,
> .max_gs_entries = 128,
> - }
> + },
> + .timebase_scale = 1000000000.0 / 19200123.0,
> };
> /*
> * Note: for all KBL SKUs, the PRM says SKL for GS entries, not SKL+.
> diff --git a/src/intel/common/gen_device_info.h b/src/intel/common/gen_device_info.h
> index 10324e6..bebd461 100644
> --- a/src/intel/common/gen_device_info.h
> +++ b/src/intel/common/gen_device_info.h
> @@ -142,6 +142,30 @@ struct gen_device_info
> unsigned max_tes_entries;
> unsigned max_gs_entries;
> } urb;
> +
> + /**
> + * For the longest time the timestamp frequency for Gen's timestamp counter
> + * could be assumed to be 12.5MHz, where the least significant bit neatly
> + * corresponded to 80 nanoseconds.
> + *
> + * Since Gen9 the numbers aren't so round, with a a frequency of 12MHz for
> + * SKL (or scale factor of 80.33333333) and a frequency of 19200123Hz for
Typo: 83
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