[Mesa-dev] [PATCH 09/10] st/vdpau: implement the new DMA-buf based interop

[Michel Dänzer]

On 28/10/16 06:04 PM, Nayan Deshmukh wrote:
> On Fri, Oct 28, 2016 at 2:14 PM, Michel Dänzer <michel at daenzer.net
> <mailto:michel at daenzer.net>> wrote:
> 
>     On 28/10/16 03:58 PM, Nayan Deshmukh wrote:
>     > On Fri, Oct 28, 2016 at 7:00 AM, Michel Dänzer <michel at daenzer.net <mailto:michel at daenzer.net>
>     > <mailto:michel at daenzer.net <mailto:michel at daenzer.net>>> wrote:
>     >
>     >     On 28/10/16 03:08 AM, Marek Olšák wrote:
>     >     > On Thu, Oct 27, 2016 at 5:23 PM, Emil Velikov
>     <emil.l.velikov at gmail.com <mailto:emil.l.velikov at gmail.com>
>     <mailto:emil.l.velikov at gmail.com <mailto:emil.l.velikov at gmail.com>>>
>     wrote:
>     >     >> On 17 October 2016 at 10:37, Marek Olšák <maraeo at gmail.com <mailto:maraeo at gmail.com> <mailto:maraeo at gmail.com
>     <mailto:maraeo at gmail.com>>> wrote:
>     >     >>> Reverting the whole commit is too much. You can just remove the PIPE BIND
>     >     >>> SHARED usage if you need to.
>     >     >>>
>     >     >> I'd imagine that one wants to check if radeon(s) behave OK with the
>     >     >> flag dropped ? Thus it might be better for someone with radeon HW to
>     >     >> give it a bash.
>     >     >> Can we have a volunteer please :-)
>     >     >
>     >     > r600-radeonsi ignore PIPE_BIND_SHARED on textures.
>     >
>     >     That doesn't mean the state tracker can just drop PIPE_BIND_SHARED.
>     >
>     >     https://patchwork.freedesktop.org/patch/110569/
>     <https://patchwork.freedesktop.org/patch/110569/>
>     >     <https://patchwork.freedesktop.org/patch/110569/
>     <https://patchwork.freedesktop.org/patch/110569/>> seems the best
>     >     candidate
>     >     for resolving the nouveau issue, but I suspect as is it might break DRI3
>     >     PRIME. Nayan, can you check this and fix it up as necessary? Basically,
>     >     PIPE_BIND_LINEAR is only really necessary for buffers which are sent to
>     >     the X server for presentation on a different GPU.
>     >
>     > It works fine with DRI3 Prime with my I+A system, but I think it won't
>     > work with a I+N system as it uses PIPE_BIND_SHARE and PIPE_BIND_LINEAR
>     > together for one buffer.
> 
>     The patch above removes PIPE_BIND_LINEAR. Which case are you
>     thinking of?
> 
>  
> We also use PIPE_BIND_LINEAR and PIPE_BIND_SHARED when allocating a
> buffer in vl_winsys_dri3.c, so do we also need to change that? 

No, that's for sharing between different GPUs, in which case both flags
are required (even with nouveau).


-- 
Earthling Michel Dänzer               |               http://www.amd.com
Libre software enthusiast             |             Mesa and X developer