[Mesa-dev] [RFC 05/11] i965/vec4: Make generate_assembly take an explicit shader_info parameter

[Jason Ekstrand]

---
 src/mesa/drivers/dri/i965/brw_shader.cpp          |  2 +-
 src/mesa/drivers/dri/i965/brw_vec4.cpp            |  4 ++--
 src/mesa/drivers/dri/i965/brw_vec4.h              |  2 +-
 src/mesa/drivers/dri/i965/brw_vec4_generator.cpp  | 10 +++++-----
 src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp |  6 +++---
 src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp        |  2 +-
 6 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index cf49c63..29de130 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -1440,7 +1440,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
 	 v.dump_instructions();
 
       return brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
-					&prog_data->base, v.cfg,
+                                        nir->info, &prog_data->base, v.cfg,
 					final_assembly_size);
    }
 }
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 75b492a..c93e2e5 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -2215,8 +2215,8 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
       }
 
       assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx,
-                                            shader, &prog_data->base, v.cfg,
-                                            final_assembly_size);
+                                            shader, shader->info, &prog_data->base,
+                                            v.cfg, final_assembly_size);
    }
 
    return assembly;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index c3b20e3..4eb49a8 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -43,7 +43,7 @@ const unsigned *
 brw_vec4_generate_assembly(const struct brw_compiler *compiler,
                            void *log_data,
                            void *mem_ctx,
-                           const nir_shader *nir,
+                           const nir_shader *nir, const shader_info *info,
                            struct brw_vue_prog_data *prog_data,
                            const struct cfg_t *cfg,
                            unsigned *out_assembly_size);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index bb18479..410399a 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -1468,7 +1468,7 @@ static void
 generate_code(struct brw_codegen *p,
               const struct brw_compiler *compiler,
               void *log_data,
-              const nir_shader *nir,
+              const nir_shader *nir, const shader_info *info,
               struct brw_vue_prog_data *prog_data,
               const struct cfg_t *cfg)
 {
@@ -2045,8 +2045,8 @@ generate_code(struct brw_codegen *p,
 
    if (unlikely(debug_flag)) {
       fprintf(stderr, "Native code for %s %s shader %s:\n",
-              nir->info->label ? nir->info->label : "unnamed",
-              _mesa_shader_stage_to_string(nir->stage), nir->info->name);
+              info->label ? info->label : "unnamed",
+              _mesa_shader_stage_to_string(nir->stage), info->name);
 
       fprintf(stderr, "%s vec4 shader: %d instructions. %d loops. %u cycles. %d:%d "
                       "spills:fills. Compacted %d to %d bytes (%.0f%%)\n",
@@ -2073,7 +2073,7 @@ extern "C" const unsigned *
 brw_vec4_generate_assembly(const struct brw_compiler *compiler,
                            void *log_data,
                            void *mem_ctx,
-                           const nir_shader *nir,
+                           const nir_shader *nir, const shader_info *info,
                            struct brw_vue_prog_data *prog_data,
                            const struct cfg_t *cfg,
                            unsigned *out_assembly_size)
@@ -2082,7 +2082,7 @@ brw_vec4_generate_assembly(const struct brw_compiler *compiler,
    brw_init_codegen(compiler->devinfo, p, mem_ctx);
    brw_set_default_access_mode(p, BRW_ALIGN_16);
 
-   generate_code(p, compiler, log_data, nir, prog_data, cfg);
+   generate_code(p, compiler, log_data, nir, info, prog_data, cfg);
 
    return brw_get_program(p, out_assembly_size);
 }
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
index e4ab760..7671d32 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
@@ -851,8 +851,8 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
                            mem_ctx, true /* no_spills */, shader_time_index);
          if (v.run()) {
             return brw_vec4_generate_assembly(compiler, log_data, mem_ctx,
-                                              shader, &prog_data->base, v.cfg,
-                                              final_assembly_size);
+                                              shader, shader->info, &prog_data->base,
+                                              v.cfg, final_assembly_size);
          }
       }
    }
@@ -902,7 +902,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
          *error_str = ralloc_strdup(mem_ctx, gs->fail_msg);
    } else {
       ret = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, shader,
-                                       &prog_data->base, gs->cfg,
+                                       shader->info, &prog_data->base, gs->cfg,
                                        final_assembly_size);
    }
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp
index 7d915a6..1479d51 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp
@@ -563,7 +563,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
 
 
       return brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
-                                        &prog_data->base, v.cfg,
+                                        nir->info, &prog_data->base, v.cfg,
                                         final_assembly_size);
    }
 }
-- 
2.5.0.400.gff86faf