[Mesa-dev] [RFC 07/11] i965/compiler: Take an explicit shader_info parameter in compile_tcs

[Jason Ekstrand]

---
 src/mesa/drivers/dri/i965/brw_compiler.h   |  1 +
 src/mesa/drivers/dri/i965/brw_tcs.c        |  3 ++-
 src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp | 28 ++++++++++++++--------------
 3 files changed, 17 insertions(+), 15 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h b/src/mesa/drivers/dri/i965/brw_compiler.h
index 69ab68d..be18f18 100644
--- a/src/mesa/drivers/dri/i965/brw_compiler.h
+++ b/src/mesa/drivers/dri/i965/brw_compiler.h
@@ -789,6 +789,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
                 void *mem_ctx,
                 const struct brw_tcs_prog_key *key,
                 struct brw_tcs_prog_data *prog_data,
+                shader_info *info,
                 const struct nir_shader *nir,
                 int shader_time_index,
                 unsigned *final_assembly_size,
diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c
index 558de2d..2a1047b 100644
--- a/src/mesa/drivers/dri/i965/brw_tcs.c
+++ b/src/mesa/drivers/dri/i965/brw_tcs.c
@@ -265,7 +265,8 @@ brw_codegen_tcs_prog(struct brw_context *brw,
    unsigned program_size;
    char *error_str;
    const unsigned *program =
-      brw_compile_tcs(compiler, brw, mem_ctx, key, &prog_data, nir, st_index,
+      brw_compile_tcs(compiler, brw, mem_ctx, key, &prog_data,
+                      &tcp->program.info, nir, st_index,
                       &program_size, &error_str);
    if (program == NULL) {
       if (shader_prog) {
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp
index 1479d51..e107512 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp
@@ -448,6 +448,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
                 void *mem_ctx,
                 const struct brw_tcs_prog_key *key,
                 struct brw_tcs_prog_data *prog_data,
+                shader_info *info,
                 const nir_shader *src_shader,
                 int shader_time_index,
                 unsigned *final_assembly_size,
@@ -458,17 +459,17 @@ brw_compile_tcs(const struct brw_compiler *compiler,
    const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_CTRL];
 
    nir_shader *nir = nir_shader_clone(mem_ctx, src_shader);
-   nir->info->outputs_written = key->outputs_written;
-   nir->info->patch_outputs_written = key->patch_outputs_written;
+   info->outputs_written = key->outputs_written;
+   info->patch_outputs_written = key->patch_outputs_written;
 
    struct brw_vue_map input_vue_map;
    brw_compute_vue_map(devinfo, &input_vue_map,
-                       nir->info->inputs_read & ~VARYING_BIT_PRIMITIVE_ID,
+                       info->inputs_read & ~VARYING_BIT_PRIMITIVE_ID,
                        true);
 
    brw_compute_tess_vue_map(&vue_prog_data->vue_map,
-                            nir->info->outputs_written,
-                            nir->info->patch_outputs_written);
+                            info->outputs_written,
+                            info->patch_outputs_written);
 
    nir = brw_nir_apply_sampler_key(nir, devinfo, &key->tex, is_scalar);
    brw_nir_lower_vue_inputs(nir, is_scalar, &input_vue_map);
@@ -479,9 +480,9 @@ brw_compile_tcs(const struct brw_compiler *compiler,
    nir = brw_postprocess_nir(nir, compiler->devinfo, is_scalar);
 
    if (is_scalar)
-      prog_data->instances = DIV_ROUND_UP(nir->info->tcs.vertices_out, 8);
+      prog_data->instances = DIV_ROUND_UP(info->tcs.vertices_out, 8);
    else
-      prog_data->instances = DIV_ROUND_UP(nir->info->tcs.vertices_out, 2);
+      prog_data->instances = DIV_ROUND_UP(info->tcs.vertices_out, 2);
 
    /* Compute URB entry size.  The maximum allowed URB entry size is 32k.
     * That divides up as follows:
@@ -500,7 +501,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
    unsigned output_size_bytes = 0;
    /* Note that the patch header is counted in num_per_patch_slots. */
    output_size_bytes += num_per_patch_slots * 16;
-   output_size_bytes += nir->info->tcs.vertices_out * num_per_vertex_slots * 16;
+   output_size_bytes += info->tcs.vertices_out * num_per_vertex_slots * 16;
 
    assert(output_size_bytes >= 1);
    if (output_size_bytes > GEN7_MAX_HS_URB_ENTRY_SIZE_BYTES)
@@ -524,7 +525,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
 
    if (is_scalar) {
       fs_visitor v(compiler, log_data, mem_ctx, (void *) key,
-                   &prog_data->base.base, NULL, nir, nir->info, 8,
+                   &prog_data->base.base, NULL, nir, info, 8,
                    shader_time_index, &input_vue_map);
       if (!v.run_tcs_single_patch()) {
          if (error_str)
@@ -541,9 +542,8 @@ brw_compile_tcs(const struct brw_compiler *compiler,
       if (unlikely(INTEL_DEBUG & DEBUG_TCS)) {
          g.enable_debug(ralloc_asprintf(mem_ctx,
                                         "%s tessellation control shader %s",
-                                        nir->info->label ? nir->info->label
-                                                        : "unnamed",
-                                        nir->info->name));
+                                        info->label ? info->label : "unnamed",
+                                        info->name));
       }
 
       g.generate_code(v.cfg, 8);
@@ -551,7 +551,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
       return g.get_assembly(final_assembly_size);
    } else {
       vec4_tcs_visitor v(compiler, log_data, key, prog_data,
-                         nir, nir->info, mem_ctx, shader_time_index, &input_vue_map);
+                         nir, info, mem_ctx, shader_time_index, &input_vue_map);
       if (!v.run()) {
          if (error_str)
             *error_str = ralloc_strdup(mem_ctx, v.fail_msg);
@@ -563,7 +563,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
 
 
       return brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
-                                        nir->info, &prog_data->base, v.cfg,
+                                        info, &prog_data->base, v.cfg,
                                         final_assembly_size);
    }
 }
-- 
2.5.0.400.gff86faf