[Mesa-dev] [v2 26/26] i965: Enable fast clears for multi-lod

Topi Pohjolainen topi.pohjolainen at gmail.com
Mon Oct 31 20:19:13 UTC 2016


From: Ben Widawsky <ben at bwidawsk.net>

On SKL (also fast clear is used for level 0, layer 0):

Manhattan 3.0:          3.88434% +/- 0.814659%
Manhattan 3.0 off:      3.25542% +/- 0.101149%
Trex:                   3.43501% +/- 0.31223%
Trex off:               4.13781% +/- 0.0993569%

ON BDW:

Manhattan 3.0:          1.37079% +/- 0.571208%
Manhattan 3.0 off:      1.74029% +/- 0.267499%

v2 (Ben, Matt): Fix rebase error by removing the perf warning

Signed-off-by: Ben Widawsky <benjamin.widawsky at intel.com>
CC: Matt Turner <mattst88 at gmail.com>
---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index ac41fdd..3db18a8 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -256,16 +256,11 @@ intel_miptree_supports_non_msrt_fast_clear(struct brw_context *brw,
       if (arrayed)
          assert(mt->num_samples <= 1);
 
-      if (mip_mapped && brw->gen >= 8) {
-         perf_debug("Multi-LOD fast clear - giving up (%dx%dx%d).\n",
-                    mt->logical_width0, mt->logical_height0, mt->last_level);
+      if (mip_mapped && brw->gen < 8) {
          return false;
       }
 
-      if (arrayed && brw->gen >= 8) {
-         perf_debug("Layered fast clear - giving up. (%dx%d%d)\n",
-                    mt->logical_width0, mt->logical_height0,
-                    mt->physical_depth0);
+      if (arrayed && brw->gen < 8) {
          return false;
       }
    }
@@ -1623,7 +1618,7 @@ intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,
       ALIGN(mt->logical_width0, width_divisor) / width_divisor;
    unsigned mcs_height =
       ALIGN(mt->logical_height0, height_divisor) / height_divisor;
-   assert(mt->logical_depth0 == 1);
+   assert(brw->gen >= 8 || mt->logical_depth0 == 1);
    uint32_t layout_flags = MIPTREE_LAYOUT_TILING_Y;
 
    if (brw->gen >= 8) {
-- 
2.5.5



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