[Mesa-dev] [PATCH 30/31] radeonsi: remove si_shader_context::is_gs_copy_shader

[Nicolai Hähnle]

From: Nicolai Hähnle <nicolai.haehnle at amd.com>

It has become redundant.
---
 src/gallium/drivers/radeonsi/si_shader.c          | 11 ++++-------
 src/gallium/drivers/radeonsi/si_shader_internal.h |  1 -
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 38f65f3..fe15420 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2659,21 +2659,21 @@ static void si_llvm_emit_gs_epilogue(struct lp_build_tgsi_context *bld_base)
 }
 
 static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context *bld_base)
 {
 	struct si_shader_context *ctx = si_shader_context(bld_base);
 	struct gallivm_state *gallivm = bld_base->base.gallivm;
 	struct tgsi_shader_info *info = &ctx->shader->selector->info;
 	struct si_shader_output_values *outputs = NULL;
 	int i,j;
 
-	assert(!ctx->is_gs_copy_shader);
+	assert(!ctx->shader->is_gs_copy_shader);
 
 	outputs = MALLOC((info->num_outputs + 1) * sizeof(outputs[0]));
 
 	/* Vertex color clamping.
 	 *
 	 * This uses a state constant loaded in a user data SGPR and
 	 * an IF statement is added that clamps all colors if the constant
 	 * is true.
 	 */
 	if (ctx->type == PIPE_SHADER_VERTEX) {
@@ -5305,51 +5305,49 @@ static void create_function(struct si_shader_context *ctx)
 		params[SI_PARAM_START_INSTANCE] = ctx->i32;
 		params[SI_PARAM_DRAWID] = ctx->i32;
 		num_params = SI_PARAM_DRAWID+1;
 
 		if (shader->key.vs.as_es) {
 			params[ctx->param_es2gs_offset = num_params++] = ctx->i32;
 		} else if (shader->key.vs.as_ls) {
 			params[SI_PARAM_LS_OUT_LAYOUT] = ctx->i32;
 			num_params = SI_PARAM_LS_OUT_LAYOUT+1;
 		} else {
-			if (ctx->is_gs_copy_shader) {
+			if (shader->is_gs_copy_shader) {
 				num_params = SI_PARAM_RW_BUFFERS+1;
 			} else {
 				params[SI_PARAM_VS_STATE_BITS] = ctx->i32;
 				num_params = SI_PARAM_VS_STATE_BITS+1;
 			}
 
 			/* The locations of the other parameters are assigned dynamically. */
 			declare_streamout_params(ctx, &shader->selector->so,
 						 params, ctx->i32, &num_params);
 		}
 
 		last_sgpr = num_params-1;
 
 		/* VGPRs */
 		params[ctx->param_vertex_id = num_params++] = ctx->i32;
 		params[ctx->param_rel_auto_id = num_params++] = ctx->i32;
 		params[ctx->param_vs_prim_id = num_params++] = ctx->i32;
 		params[ctx->param_instance_id = num_params++] = ctx->i32;
 
-		if (!ctx->is_gs_copy_shader) {
+		if (!shader->is_gs_copy_shader) {
 			/* Vertex load indices. */
 			ctx->param_vertex_index0 = num_params;
 
 			for (i = 0; i < shader->selector->info.num_inputs; i++)
 				params[num_params++] = ctx->i32;
 
 			num_prolog_vgprs += shader->selector->info.num_inputs;
-		}
 
-		if (!ctx->is_gs_copy_shader) {
 			/* PrimitiveID output. */
 			if (!shader->key.vs.as_es && !shader->key.vs.as_ls)
 				for (i = 0; i <= VS_EPILOG_PRIMID_LOC; i++)
 					returns[num_returns++] = ctx->f32;
 		}
 		break;
 
 	case PIPE_SHADER_TESS_CTRL:
 		params[SI_PARAM_TCS_OFFCHIP_LAYOUT] = ctx->i32;
 		params[SI_PARAM_TCS_OUT_OFFSETS] = ctx->i32;
@@ -5576,21 +5574,21 @@ static void preload_ring_buffers(struct si_shader_context *ctx)
 	    ctx->type == PIPE_SHADER_GEOMETRY) {
 		unsigned ring =
 			ctx->type == PIPE_SHADER_GEOMETRY ? SI_GS_RING_ESGS
 							     : SI_ES_RING_ESGS;
 		LLVMValueRef offset = lp_build_const_int32(gallivm, ring);
 
 		ctx->esgs_ring =
 			build_indexed_load_const(ctx, buf_ptr, offset);
 	}
 
-	if (ctx->is_gs_copy_shader) {
+	if (ctx->shader->is_gs_copy_shader) {
 		LLVMValueRef offset = lp_build_const_int32(gallivm, SI_VS_RING_GSVS);
 
 		ctx->gsvs_ring[0] =
 			build_indexed_load_const(ctx, buf_ptr, offset);
 	}
 	if (ctx->type == PIPE_SHADER_GEOMETRY) {
 		int i;
 		for (i = 0; i < 4; i++) {
 			LLVMValueRef offset = lp_build_const_int32(gallivm, SI_GS_RING_GSVS0 + i);
 
@@ -6100,21 +6098,20 @@ si_generate_gs_copy_shader(struct si_screen *sscreen,
 
 	shader = CALLOC_STRUCT(si_shader);
 	if (!shader)
 		return NULL;
 
 	shader->selector = gs_selector;
 	shader->is_gs_copy_shader = true;
 
 	si_init_shader_ctx(&ctx, sscreen, shader, tm);
 	ctx.type = PIPE_SHADER_VERTEX;
-	ctx.is_gs_copy_shader = true;
 
 	create_meta_data(&ctx);
 	create_function(&ctx);
 	preload_ring_buffers(&ctx);
 
 	args[0] = ctx.gsvs_ring[0];
 	args[1] = lp_build_mul_imm(uint,
 				   LLVMGetParam(ctx.main_fn,
 						ctx.param_vertex_id),
 				   4);
diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h
index 669813c..55b70e6 100644
--- a/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -45,21 +45,20 @@ struct radeon_shader_binary;
 
 struct si_llvm_flow;
 
 struct si_shader_context {
 	struct lp_build_tgsi_soa_context soa;
 	struct gallivm_state gallivm;
 	struct si_shader *shader;
 	struct si_screen *screen;
 
 	unsigned type; /* PIPE_SHADER_* specifies the type of shader. */
-	bool is_gs_copy_shader;
 
 	/* Whether the prolog will be compiled separately. */
 	bool separate_prolog;
 
 	/** This function is responsible for initilizing the inputs array and will be
 	  * called once for each input declared in the TGSI shader.
 	  */
 	void (*load_input)(struct si_shader_context *,
 			   unsigned input_index,
 			   const struct tgsi_full_declaration *decl,
-- 
2.7.4