[Mesa-dev] [PATCH] intel/blorp: Work in terms of logical array layers
Pohjolainen, Topi
topi.pohjolainen at gmail.com
Mon Sep 5 06:06:55 UTC 2016
On Sat, Sep 03, 2016 at 04:09:26PM -0700, Jason Ekstrand wrote:
> When Ivy Bridge introduced array multisampling, someone made the decision
> to do lots of stuff throughout the driver in terms of physical array layers
> rather than logical array layers. In ISL, we use logical array layers most
> of the time and it really makes no sense to use physical array layers in
> the blorp API. Every time someone passes physical array layers into blorp
> for an array multisampled surface, they're always divisible by the number
> of samples and we divide right away.
>
> Eventually, I'd like to rework most of the GL driver internals to use
> logical array layers but that's going to be a big project and will probably
> happen as part of the ISL conversion. For now, we'll do the conversion in
> brw_blorp and let blorp just use the logical layers.
>
> Signed-off-by: Jason Ekstrand <jason at jlekstrand.net>
> ---
> src/intel/blorp/blorp.c | 14 ++------------
> src/mesa/drivers/dri/i965/brw_blorp.c | 28 +++++++++++++++++++++++-----
> 2 files changed, 25 insertions(+), 17 deletions(-)
>
> diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
> index 711bd3f..9d175ae 100644
> --- a/src/intel/blorp/blorp.c
> +++ b/src/intel/blorp/blorp.c
> @@ -64,16 +64,6 @@ brw_blorp_surface_info_init(struct blorp_context *blorp,
> unsigned int level, unsigned int layer,
> enum isl_format format, bool is_render_target)
> {
> - /* Layer is a physical layer, so if this is a 2D multisample array texture
> - * using INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, then it had better
> - * be a multiple of num_samples.
> - */
> - unsigned layer_multiplier = 1;
> - if (surf->surf->msaa_layout == ISL_MSAA_LAYOUT_ARRAY) {
> - assert(layer % surf->surf->samples == 0);
> - layer_multiplier = surf->surf->samples;
> - }
> -
> if (format == ISL_FORMAT_UNSUPPORTED)
> format = surf->surf->format;
>
> @@ -125,9 +115,9 @@ brw_blorp_surface_info_init(struct blorp_context *blorp,
> info->view.base_array_layer = 0;
> info->view.array_len = MAX2(info->surf.logical_level0_px.depth,
> info->surf.logical_level0_px.array_len);
> - info->z_offset = layer / layer_multiplier;
> + info->z_offset = layer;
> } else {
> - info->view.base_array_layer = layer / layer_multiplier;
> + info->view.base_array_layer = layer;
> info->view.array_len = 1;
> info->z_offset = 0;
> }
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
> index 98b5bae..193c7a4 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> @@ -274,6 +274,20 @@ swizzle_to_scs(GLenum swizzle)
> return (enum isl_channel_select)((swizzle + 4) & 7);
> }
>
> +static unsigned
> +physical_to_logical_layer(struct intel_mipmap_tree *mt,
This should be const. Otherwise:
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> + unsigned physical_layer)
> +{
> + if (mt->num_samples > 1 &&
> + (mt->msaa_layout == INTEL_MSAA_LAYOUT_UMS ||
> + mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS)) {
> + assert(physical_layer % mt->num_samples == 0);
> + return physical_layer / mt->num_samples;
> + } else {
> + return physical_layer;
> + }
> +}
> +
> /**
> * Note: if the src (or dst) is a 2D multisample array texture on Gen7+ using
> * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, src_layer (dst_layer) is
> @@ -360,9 +374,11 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
>
> struct blorp_batch batch;
> blorp_batch_init(&brw->blorp, &batch, brw);
> - blorp_blit(&batch, &src_surf, src_level, src_layer,
> + blorp_blit(&batch, &src_surf, src_level,
> + physical_to_logical_layer(src_mt, src_layer),
> brw_blorp_to_isl_format(brw, src_format, false), src_isl_swizzle,
> - &dst_surf, dst_level, dst_layer,
> + &dst_surf, dst_level,
> + physical_to_logical_layer(dst_mt, dst_layer),
> brw_blorp_to_isl_format(brw, dst_format, true),
> ISL_SWIZZLE_IDENTITY,
> src_x0, src_y0, src_x1, src_y1,
> @@ -760,7 +776,8 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
>
> struct blorp_batch batch;
> blorp_batch_init(&brw->blorp, &batch, brw);
> - blorp_fast_clear(&batch, &surf, level, layer,
> + blorp_fast_clear(&batch, &surf, level,
> + physical_to_logical_layer(irb->mt, layer),
> (enum isl_format)brw->render_target_format[format],
> x0, y0, x1, y1);
> blorp_batch_finish(&batch);
> @@ -781,8 +798,9 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
> blorp_batch_init(&brw->blorp, &batch, brw);
> blorp_clear(&batch, &surf,
> (enum isl_format)brw->render_target_format[format],
> - ISL_SWIZZLE_IDENTITY, level, layer, x0, y0, x1, y1,
> - clear_color, color_write_disable);
> + ISL_SWIZZLE_IDENTITY, level,
> + physical_to_logical_layer(irb->mt, layer),
> + x0, y0, x1, y1, clear_color, color_write_disable);
> blorp_batch_finish(&batch);
>
> if (intel_miptree_is_lossless_compressed(brw, irb->mt)) {
> --
> 2.5.0.400.gff86faf
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
More information about the mesa-dev
mailing list