[Mesa-dev] i965: Allocate mcs directly for lossless compressed

[Topi Pohjolainen]

This mini-series replaces patches 1-4/12 in "Hardware assisted
layered clears". This is based on Jason's feedback and some offline
discussion.

Mostly it tackles tries to tackle cases where a render pass uses the
same surface for both texturing and rendering. In case the surface
suppors lossless compression care needs to be taken that both uses
are set up the same way.

1) Sampling thru texture view using a format that the sampling engine
   doesn't understand as compressed:
   Mark aux buffer disabled for renderbuffer, resolve the color buffer,
   set both tex and rb surfaces without aux buffer (i.e., as
   non-compressed.

2) Sampling a compressed buffer which is resolved needs to be set with
   auxiliary buffer if the same surface is also going to written in the
   same rendering pass.

CC: Jason Ekstrand <jason at jlekstrand.net>

Topi Pohjolainen (6):
  i965/rbc: Allow integer formats as advertised in isl_format.c
  i965: Replace boolean rb surface state setup argument with flags
  i965: Track non-compressible sampling of renderbuffers
  i965/rbc: Set aux surface sampling engine according to rb settings
  isl/gen8+: Allow 1D and 3D auxiliary surfaces
  i965/rbc: Allocate mcs directly

 src/intel/isl/isl.c                              |   3 +-
 src/mesa/drivers/dri/i965/brw_blorp.c            |  13 +--
 src/mesa/drivers/dri/i965/brw_context.c          |  16 ++++
 src/mesa/drivers/dri/i965/brw_context.h          |  12 ++-
 src/mesa/drivers/dri/i965/brw_draw.c             |   4 +-
 src/mesa/drivers/dri/i965/brw_state.h            |   2 +-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 110 ++++++++++++++++++++---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c    |  68 ++++----------
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h    |   7 +-
 9 files changed, 154 insertions(+), 81 deletions(-)

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2.5.5